JARAL D. PASIN

***** ******** *****, ********, **. 91354

adslvy@r.postjobfree.com cell 661-***-****

SUMMARY and PROFESSIONAL EXPERIENCE:

• As senior design engineer, and project engineer, I had responsibilities in R&D Design and development. Designed in the fields of Aerospace, industrial, Medical, and Automotive electronics. Designed high speed digital and Analog circuits within multi systems level and Microcontroller based sub system modules, Programmable logics, Asic, control interface, ADC, DCA, switching supply, Controlled Current / Voltage Hybrid IC power supplies, Boost and Buck, AC-DC, DC-DC, FPGA, RF transceiver and high-speed communications circuits including spi, I2c, sdlc, RS232, Can bus, Ethernet, Arink and SATA 1.5/3.0Gb/s (150/300 Mbps). I have designed for Subsystems hardware power supply unit for airborne system, com-link-control systems, Wi-Fi and Z-wave link.

•Designed circuits for vehicle guidance and navigation circuits, Mil-std, DO-254, DO-160 verification.

•Designed active and passive filter, low noise amplifiers, LNA, mixed-signals, EMI, Programmable devices, CPLD, FPGA, microprocessor and Single Board Computers (SBC).

•Designed for Power-PC, Risc-processor, microcontrollers C8051F12x, PXA270 and Pic16F1824.

•Designed for microwave and RF interface circuits, communications interfaces and matrix design.

•Designed Fiber Optic links, wireless communications, transceivers, optical sensors, and video processor.

•Designed for high-speed bus; SCSI, SPI, I2c, IR, USB, CAN, enhanced ECP, EPP, RS422, RS232, 1553B bus.

I have been lead designer for “stratum-II, rubidium reference clock” synchronization. I have designed hardware systems including PLL and DPLL for frequency measurements for Telecom System clock synchronization, Vision system, Airborne “radar antenna scan Synchronizations”, Circuit switching, Power management, Brushless DC drive circuits, motor protection current limit, RF transceiver, Embedded Power-PC, WIFi-80211b/g, Bluetooth, Infotainment and HMI. Conducted project engineering task for advance products design. Conducted design reviews for PDR, MDR and final FDR.

•Designed DSP processor interface and high-speed hardware template correlation for “sub noise signal” recovery Designed memory architecture for SDRAM, DDR, DDR2, DDR3, Serial ATA interface (SATA).

•Design backplane bus, VME, PCI, Race++ and DCP, SLC Loop system. Designed Power-PC, embedded computing boards.

•Used schematics tools OrCAD, Pads, Cadence, DX-designer, Mentor Graphics, Altium Designer and Xilinx ise WebPac development automation. Wrote technical documents, circuit analysis, and design/ compliance.

I have done system Integration, verification in product development, designed boards and conducted test and measurements on Air-born Processor subsystem-unit with 18 VME boards, embedded processors and I/O boards. Designed SerDes circuit boards and programmable logics, High-speed Backplane, radar transceiver circuits for defense electronics and industrial equipment, participated in team proposal writing, used MS words, excel, power point and Project. Debug hardware circuits for product support, and upgraded new design concepts.

Employment Experiences:

Consultant at; Curtiss Wright Defense solutions. Valencia, Ca. 91355. August, 2020- 2022

Conducting design evaluation performance of Power-PC, PPC boards computing system.

Perform circuit analysis, debug, analyze faulty units and recommend design corrections.

Conduct design review for control systems. Review DVT, and integration of hardware, and power systems.

Designed and analysis for hybrid controlled application IC power supply VCM / ICM modules.

Carry Customer product support for defense projects.

Analyze operation and validate ATP equipment/ and process. Fault analysis and correction on returned RMAs.

Perform PDR, CDR and FDR reviews for new design and upgraded legacy for new product development.

Lead and supported the faulty product engineering team, and for new product correction and test group.

Hochiki America, Buena Park, Ca. 4/8/2014–July, 2020

Fulltime position for Fire Panel Control systems, “National early fire detection and alarm repot”.

• I had responsibility of R&D lead design and project engineering for the Fire Control Panels and Advance Sensor Modules Design. Working in direct full time position on advance product-design of control panel and early fire detection alarm systems for large area closed control system. I have designed for Analog addressable Digital Control Panels (DCP) and SLC, ‘Signaling Line Circuit’ loop interfacing, developed Faults and Security Integration sub-systems.

• Designed advance analog sensor product interface modules,(NAC) Notification Appliance Circuits, mixed analog signal circuits. Developed Power and Current Link protocol.

•Designed Analog/Digital and mixed bus system modules. Designed hardware and microcontroller circuits for advance products, applying NFPA, UL requirements for Signaling and Sound systems. Designed implementation “Dial to Central Station system”, used PIC processors, monitoring CO2, CO, percent of gas level and analog level heat and optical sensors.

•Design for flame detector and supervisory circuits for current and Switch-Contact monitoring system. Designed for the wireless and Data-linked reporting to control panel station. Designed, SLC, and analog power circuits. Designed wire to wireless system modules, early detections circuit and alarm system with monitoring supervisory and the battery charging system.

Infotainment and HMI system Design engineer. Fisker-EV. Electrical Vehicle, Anaheim, CA. 5/2011– 4/5/ 2014

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•Fulltime position as Technical Specialist and senior design engineer, I have designed for advance interface modules and “Head unit” processor, mother board, display system, Infotainment and HMI. Developed for automotive phone system and music command center, audio, video, display interface, navigation, satellite radio, Bluetooth, Wi-Fi and Power-train interface, command and control diagnosis. Improved protocols for CAN bus, Lin bus and j1850.

•As project design engineer designed for the central Interface, architecture for the INVIDIA System CIU Head unit, HMI, ‘CAN’ Control Area Network, USB, LVDS and S/PDIF interface. Designed Proximity and Gesture logic. Designed analog and digital circuit, CPLD, FPGA, Microprocessor circuits and PCB.

•Used Altium Designer. Designed class-D power audio amplifiers and circuit boards for audio mixer,

USB hub and S/PDIF interface, designed Surround sound system for head unit processor ‘Jacinto’.

•Designed for the vehicles flashing station and subsystem modules. Designed Vector controlled boars for the Traction Drive 'EMIVT (Electro-mechanical Infinitely Variable Transmission) system'. Designed the necessary hardware for electronic feedback and control operation board in the Line Replaceable Unit (LRU) field replacement/servicing.

CMTC, and General Dynamics. 10/2008- 4/2011

•Senior Hardware Designer and Project Engineer, worked as contract /Consulting position at General Dynamics, and CMTC. On Transponder system for US navy used shark and DSP processors.

•Developed ‘position stabilizer’ for antenna control, motor drive interface and synchronization, used Orcad, Actel CPLD, and AMD Black-fin Processor, Designed brass-board and reference boards, wrote requirements descriptions, and designed circuit boards, used Altium Designer and Mentor graphics DX-Designer.

•Performed the Implementation for DO-254 section-10; (10.1.1-10.1.6, Cast-27), failure analysis. Have analyzed trade-off for components selections for US Navy and Coast guard communication unit.

•As senior design engineer, for GDLS General Dynamic ground system assault vehicle development, worked in advance design and verifications for vehicle Communications system, radar, and control links, design interface boards between subsystems. Including 1553B, ARINC 429, LVDS.

• Designed for payload Actuators and motor controls used in the Air force bomber vehicles (DO-160) validation. Performed task for product test and unit integration and co-engineering between electrical, mechanical and software engineering group.

Physical Optics Corporation, Torrance CA Senior Design Engineer. 5/2006-9/2008

•Fulltime position as hardware design engineer, designed for high speed PXA270 Processor and transceiver data communications. Designed for WIFI_80211b/g wireless and Optical transceivers, designed electronics circuits, motor Radar interface, detected human body/skin movement, and heart beat detection,

•Designed analog and high-speed digital circuit, Bluetooth and USB port, SDIO interface, and done data validation. Designed RF interface board, JTAG, DDR2/3/4, USB2/3, and the mother board.

•Used Mentor Graphics, DX-designer, Protel, Spice, DSP-micro Processor, C8051F12x/ PXA270 processors, designed for DDR memory board. Used Allegro.

Vista Controls, Embedded Computing boards, Santa Clarita, CA 09/2004-04/2006

Senior Design Engineer for SBC embedded computing board design, designed circuit boards as follow;

•Designed memory bus, Bridges, PCI bus, DDR, DDR-2, and high-speed bus for Computing boards.

•Designed for the embedded Computing Boards, simulations, and high-speed USB and Ethernet interface, Ethernet over twisted pair, 10/100BASE-T and gigabit Ethernet.

•Conducted Design reviews, designed circuit boards and card cage, used Xilinx, and Lattice ispMACH, XPLD and ECP/ EC FPGA (used ispLever), Altera cyclone II FPGA and Actel ProASIC (flash base) products. Designed ATE test automation stations and FPGA hardware design, processed with engineering team, mechanical engineering, and software engineering groups.

•Worked on Pulmonetics, patients assist project, designed schematics, did design reviews and systems configuration for the patients assist respiratory system. Designed circuit boards and Performed verification.

Consulting position at BOEING SATELLITE SYSTEMS, El Segundo CA 07/2003-09/2004

•Design for the 1553B bus system. Did protocol design for Test case architecture, DO-254, DO-160 Asic test development, and set specifications for system handshake and simulation.

•As member of the Boeing 1553B ASIC Development performed Test development, wrote design requirements specifications for 1553B and ASIC, RTL. Used C and Allegro.

•Developed test cases for PCICOMII-ASIC, Bus-Controller and Remote-Terminal. Verified ASIC simulation and test cases for the FPGA brass board design and prototyping.

Consulting with M-tech EDO Aeronautics Systems. Developed the digital and analog circuits and Power PC control subsystems, and designed interface to the Igniter for Bomber unit and torpedo carrier systems unit. Used Xilinx FPGA, VHDL and Allegro tool.

•Developed power control unit, Motor drive circuits control and interface, designed optical interfaces, DOD, Mil. STD 1760 station interface, and 1553B RT and Bus Controller.

•Designed for the Navy Bomber Squib card, the analog control board, system, used FPGA, design with Xilinx, Virtex II, 4 and cool-runner, (used ISE-8.2i, foundation).

• Designed PCI interface and switching power supply, EMI filters and completed technical spec.

ITT-Gilfillan, Aerospace company, Van Nuys, CA. 02/2002- 06/2003

Fulltime position for Power PC Processor Subsystem design. Principal Design Engineer (MTS).

•Responsible for design of the Antenna Synchronizer for Airborne Mobile Approach System.

•Designed control interface for antenna rotation and High voltage DC/DC Power interface control, EMI filters, configuration development, and performance prediction and DO-254 certification and DO160.

Was Unit engineer for Power PC processor sub-system and for airborne antenna interface control system, Antenna synchronization, simulation, and motor drive and actuator drive circuits. As end–to–end project engineer conducted design reviews (PDR, CDR, and FDR), wrote documentations for the subsystem.

Designed with 29K and ARM-7 processors. Analyzed and wrote the antenna signal processing timing spec requirements for RF transceiver modes documentation.

Designed RF daughterboard, evaluated performance of design based on analyzing performance data.

•Designed motherboard, for Azimuth and Elevation Scans ‘timing Bins’ (Short/Long range) CW wave timing. Used Lattice CPLD. Designed control board for antenna stabilizer positioning. Design for DDR, DDR2/ DDR3.

•Designed Power PC subsystem, used 18 Custom off-the-Shelf, COTS boards on PCI and VME bus.

•Designed High-speed backplane RACEway++ Interlink VME, multi-target processing circuit bus.

•Extracted receiver I/Q data, for RF processor and wrote subsystems tech manual.

•Designed using a Pentium processor for 'Multiple Link Array Antenna System' (MLAS).

•Designed interfaces for Beam Steering Unit (BSU), active antenna interface control and components.

•Implemented the PCI/ PCIX mezzanine cards (PMC), supported unit for integration and field demo.

•Used Cadence, Orcad, Lattice CPLD tools and wrote test documentations.

ZEBRA TECHNOLOGY INC., Camarillo, CA 01/1998- 02/2002

Senior Hardware Design and Project Engineer

•Designed Analog circuits and Digital electronics, memories, 8/16 bit Microcontrollers, Optical Data, optical sensors, Brushless Motor drivers and Reliability of Electronic components. DC/DC power supplies, Thermal protection, Print-head driver, Memory design, Stacked RAM, DDR2 and DDR3.

•Designed remote links and data transfers links RS232/ 422, RS1488, and USB ports.

•Designed Memory banks, used CPLD, FPGA, power amplifiers and Optical sensors.

•Technical responsibility of product design, project engineering, EMI, and EMC.

•Supported design validation, UL/CE, quality and product specs. ISO9000/9001 requirements.

Lead function designer and bridge between process engineering, mechanical engineering, and software groups to provide

DATUM effratom / Ball Corp. ‘Time & Frequency Products’, Irvine, CA 01/1993-01/1998

Senior Analog hardware and Digital Designer, worked as Project Engineer, and Lead designer.

•As lead designer and project engineer, designed and developed a Frequency Measurement System ‘FMS1240’, a Stratum-II clock measurement system for Shanghai Bell T1/E1 Com lines reference clock. Developed a computer based real time reference clock for measurements system.

•Developed Timing-frequency product and integrated six systems in Shanghai China.

•Implemented Datum/ Efratom rubidium atomic clock reference oscillator stratum-II (10**12) and GPS received clock Stratum-I (10**13) system (Was Patented for design applications for reference clock).

•Generated E1/T1 reference clock with monitored Stratum-II frequency reference application.

•Designed low-noise Amplifiers, Analog mixers, frequency synthesizer, used programmable logics Atmel and Lattice CPLD, high-speed counters. PC-computer, achieved accuracy 1e-11 for the Rubidium clock reference development, designed Analog circuit for atomic oscillator, digital mixers, filters and frequency converters. Used MC68HC11, Actel, CPLD and Xilinx FPGA. Generated inventor patent for Rubidium reference-clock. Design approach based on analyzing performance data. Participated in the Patent generation.

CUBIC Defense Systems. San Diego, CA. Senior Digital Hardware Engineer 11/1991- 12/1992

Designed high-speed DSP digital signal processing system. Used TI DSP-RISC processor ‘TI320C30-40’.

•Used GPS receiver data, with interaction encoded data received from airplane, designed in CPLD correlation algorithm circuits, recovered sub-level signal from aerial target, correlated sub-noise signal level imbedded in carrier frequency, correlated with encoded data from ASIC, processed through digital-PLL, extracted data.

•Designed circuit architecture with DSP microprocessor, high-speed (2ns) memory banks, EE proms, static ram, dual-port ram, periodic timer counter, SIO ports (RS-232, RS-422). Used DSP TI320C30.

•Designed for Torpedo interface, digital video RAMDAC, used 29k RISC microprocessor, Xilinx LCA.

•Designed data manipulation using high-speed memory, DDR, and SATA interface.

•Designed ‘Torpedo Interface Analog circuit board for the Navy. Designed control module.

•Designed a multiplexer unit with digital PLL. Sync and word insertion circuit for 31 T1/E1 lines.

•Designed a high-speed 100-megabit encoder, temperature control (thermo-coolant) for Laser diode.

R.A. MC DONALD, INC (RAM VISION), Chatsworth, CA. Sr. Design Engineer … - 1991

•Designed a machine vision system based on real time high-speed template correlation.

•Designed for analog video processing, and digitized video signals.

•Designed phase-lock-loop for video phase clock, extracted binary image, edge, and dynamic image for real time pattern recognition. 'Machine vision system’ used TMS320C40.

•Designed image-correlation circuit used ECL logic and TI320C25 DSP and Actel CPLD.

•Designed high-speed 1 Mega byte IEEE-1488 parallel data dump and serial ports RS232, RS422.

EDUCATION:

•MSEE Signal Processing and Communications Northeastern University, Boston, MA.

•BSEE Electrical Engineering University of Massachusetts, Amherst, MA.

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