EDUARDO P. SENDAYEN
**** *** **** *** 408-***-**** cell
San Jose, CA 95132 *********@*****.***
OBJECTIVE
Seeking for an engineering technician or manufacturing technician position
QUALIFICATIONS
Background includes experience in both hard drive and semiconductor industries
Broad technical experience in wafer production and analytical measurement of heads and magnetic media.
Knowledgeable in FIB metrology tools, AFM, SEM/EDS measurement
EXPERIENCE
Western Digital Corporation, San Jose, CA Feb 2022 to Present
Wafer Manufacturing Operator
Operates PVD tools
Performs deposition and etch on all layers associated to wafer manufacturing
Monitors processes using Nano, XRF and ResMap
Uses SPC, MESA and OCS in wafer processing
Frore Systems, Fremont, CA Aug 2021 to Nov 2021
Front-End-Of-Line (FEOL) Technician
Support various FEOL processes including thermal anneal, wet clean, coating and PVD in cooperation with R&D engineering
Perform in-process and final quality control checks on devices.
Interact with support groups to maintain R&D schedules and work with engineers to resolve line issues
Tesla Energy, Fremont, Ca Feb 2017 to Sep 2018
Process Technician II
Performs manufacturing related processes in different stages such as Module Line, Front End, and Back End.
Uses Cell Color Sorter and Scribe, Cleave and Bond equipment
In Back End Process, performs tile trimming where heated knife is used to trim excess TPO.
Also performs final cleaning with 10% isopropanol, hardware install, voltage tester and EL imaging, and final packaging after the 48 hrs curing period.
Solar City Corporation, Fremont, CA Dec 2015 to Jan 2017
Process Technician III
Metrology
Utilized C. Sun inert gas oven for annealing wafers
Used Wet ISO for etching, coating and hot water drying (HWD)
JRT Photovoltaics: cell line final test
Patterning
Processed silicon wafers through JRT loader
Laminator 1 & 2 laminates framed wafers
Acura pattern exposure
Peeler – remove film protective layer, top and bottom
Developer – patterns wafer layout, resist coated as temporary protective layer
IPS Frame manual extraction, separates and aligns wafer for rinsing
Performs each steps until final stage and inspects wafers for completion
LAM Research, Fremont, CA. Apr 2012 to Jan 2013
Senior Process Technician
Performed application support on metrology instruments including Scanning Electron Microscope (SEM) imaging
Set up, operated, and corrected fault conditions on metrology equipment
Supported and ran live demo requests per engineer’s instructions
Utilized Metrology tools such as FEI Magellan 400L, UHR SEM, Zeiss Supra 55 Gemini and FEI Helios DualBeam SEM/FIB
Provided support for Plasma Etch engineering organizations as needed
Solexant, San Jose, CA. Sep 2010 to Apr 2012
SEM Technician, R&D Department
Supports product development engineers for the next generation of solar cell
Performs product development analysis through data images, profiles and element analysis through EDX
Performs trouble shooting such as filament replacement and alignment and other standard tool maintenance and software errors
Uses SEM LEO 435 and prepares samples prior to processing
Spansion, Sunnyvale, CA. Sep 2007 to Sep 2008
SEM/FIB Sample Preparation Technician, AMG (Advanced Memory Group)
Supports Advanced Memory Technology Department in developing the next generation of flash memory
Utilizes metrology tools such as FEI DualBeam System,(FEI 820/FEI 835), XL50 Philips SEM/EDX, Hitachi SEM, (4700) and Zeiss Axio Scope,(Photomicrography)
Performs wafer dicing, die cleaving and cross sectioning using Shimadzu indenter, SELA (MC-600) micro cleaving system, Disco saw (DAD 321), Oxford Plasma 80 Plus (CVD18) and TED Pella (sputter coater)
Uses Job Tracking system to monitor requests and create image report for data transfer
Western Digital, Fremont, CA. Apr 2006 to Jul 2006
Device Manufacturing Technician, FIB/Photolithography, Wafer Fab Department
Utilized metrology tools such as Micrion 9000 Series FIB system, FEI, JEOL Systems, KLA Tencor and CERTUS for critical dimension control and head trimming, device editing, structural analysis and imaging for control of submicron structures
Handled AFM (Atomic Force Microscopy) for roughness analysis, section and step height analysis
Used VSS (Verax SPC Suite) for data entry and Workstream to log runs
MMC Technology, San Jose, CA. Oct 2005 to Mar 2006
Sr. FA Associate Technician, Manufacturing Department
Supported production through root cause failure analysis for Magnetic Thin Film Media
Utilized analytical tools such as optical microscope, Zeiss, Proquip tester, and Wyko
Assisted in coordination of experimental runs, support corrective action process and make recommendations to engineering as to probable cause and solution.
Western Digital, Fremont, CA. Jun 2003 to Sep 2005
Device Manufacturing Technician, FIB/Photolithography, Wafer Fab Department
Utilized metrology tools such as Micrion 9000 Series FIB system, FEI, JEOL Systems, and CERTUS for critical dimension control and head trimming, device editing, structural analysis and imaging for control of submicron structures
Handled AFM (Atomic Force Microscopy) for roughness analysis, section and step height analysis
Used VSS (Verax SPC Suite) for data entry and Workstream to log runs
Read-Rite Corporation, Fremont, CA. Jun 1989 to Jun 2003
DMT (Device Manufacturing Tech.), FIB/Photolithography, Wafer Fab Department
Utilized metrology tools like Micrion 9000 FIB, FEI and JEOL Systems for structural and profile analysis
Used AFM (Atomic Force Microscopy) for roughness analysis, section and step height analysis
EDUCATION AND TRAINING
BS in Marine Transportation, PMI, Manila, Philippines
Metrology on-site training JEOL/FEI Process Improvement Training, TQM, Western
Learning Classes Statistical Process Control (SPC) Microsoft Training Workstream VSS