Performance Engineer Engineering Technician

Jim Farjami

*******@***.***

503-***-****

Objective: Validation or Debug Entry level Engineer at Intel. Education.BS, PSU. Background: Computer Engineering.

Experience: Senior Engineering debug Technician as entry level validation engineer between Feb 01, 1994 to Feb 01, 1995 at Intel. In Hillsboro, Oregon.

Worked as validation engineering Technician by CDI as contractor between 1995 and 1996. Worked at Intel, Hillsboro, Oregon.

Completed all technical Engineering training courses in Intel. (Feb 1994-Feb 1995).My 1.5 years ‘experience at Intel, Computer architecture Knowledge, familiarity with Windows/OS knowledge, scripting/Python knowledge and passion to learn and aptitude to solve problems by using digital analyzer and USB GA 1102CAL / analog and digital Scope system of Intel.

I have experienced in Intel for one year in the following applications: worked almost 1.5 years for Intel. Evaluation and assessment: Talent consultant, Pricila Solano of Intel talent acquisition team has qualified and assessed me in writing for Performance debug engineer at Intel. My second reference is Daniel Stowell, Talent Consultant of Intel global talent acquisition team who has assessed and evaluated me to be qualified for power and performance Engineer position at Intel.

I used HW debugs tools (logic analyzers, high-speed scopes). PC system and Microprocessor operation validation and/or development for BIOS of Flash system on PC board. 2-Debug tools/protocols such as JTAG, automation scripting languages (such as Python).Familiar with the following tools: Tec DPO 70000SX ATI. High Speed Oscilloscope 70 GHZ. 2- TLA 7000 Series Logic Analyzer. Familiarity with basic C Language and Basic Python language. Knowledge of PC architecture and Intel chipsets

Knowledge of Networking and Communications protocols, or interconnect fabrics.

Software validation experience, preferably in Linux, Fedora or other UNIX.* Development process, optimization techniques, and debugging/testing methodologies.* Proficient in coding in C, C++, Python Scripting.* Low-level software skills (i.e. kernel debug, device drivers) are a plus!

Familiar with Intel System Studio Developer: With Intel JTAG debugger and Minnow Board MAX, how to debug errors...

BIOS in Flash chip:

Worked as part of a team, debugging of components of PC that was included Microprocessor, BIOS of Flash, Ram and Rom by using of logical analyzers, DMM, oscilloscopes),power meters, optical test instrument and assemble language ( Test script ) working of PC board under Microscope, adds Microprocessor (Pentium), connects the board to oscilloscope and checking of signals. Connect the PC board to logic analyzer by using of emulator. Checking of output Flash device (BIOS) by logic analyzer. The logic analyzer captured.

Please refer to my work history at Intel ( WWID : 10484983 ) .

The output data of BIOS and result indicated in form of assembly language or binary code. Pursuant to assembly instruction code, if the result was wrong or data in Flash was corrupted, we replaced the device Flash IC with corrected BIOS or other components that failed. Then the PC board was tested on test system by test software. Microprocessor transferred data in form of 32 bits addressing and 64 bits data through I/O device interface to logic analyzer system for testing of components device on PC board. After I set up the logic analyzer for testing board, triggered in order to look at BIOS (POST) power on self - test. Jumped to the address pointed to by the processor reset vector (FFFF0h). All posts tested and initialization was then executed. If the result indicated successful, I realized that POST called INT 19h Bootstrap Loader. As a result the PC board system passed the test. Otherwise I looked at logic analyzer and I could find what address in binary code failed and found the defected component for, fixing and replacing of device.

Experience and knowledge of analog and digital design systems.

Familiar with basic UNIX, Win X operating system. MS Word. Microsoft network.

Test components and assemble prototype. Experience and knowledge of reading of Engineering Of schematic. Familiar with basic C Shell language. Install and work with emulator lab. Do simple diagnostic test runs by software. Strong back ground in FPGA, PROM chips, RTL and Digital Logic State Machine.

Experience of UNIX operating system. Work on following commands: Utility Commands. File Management Commands. Text File Commands. Process Management Commands. UNIX Shell Commands. The EX/VI Text Editor. Text Processing Commands. Experience of with WIN 7 operating system. Debug and validation of prototype systems. Strong technical and problem solving skills. Server Chipset architecture experience.

Language: English, German & Persian