CURRICULAM VITAE

Name : DEENU K

Address : D/O KAMALUDEEN M

N.A.M MANZIL,

GOVINDAPURAM (PO), MUTHALAMADA

PALAKKAD - 678507

E-Mail Id : adnzpk@r.postjobfree.com

Contact No: 897-***-****

CAREER STATEMENT

To be a part of an organization where I can fully utilize my skills and make a significant contribution to the success of the employer and at the same time my individual growth as a loyal citizen.

CAREER SUMMARY

COURSE

BOARD/UNIVERSITY

INSTITUTION

YEAR OF PASSING

AGGREGATE

M.E in Applied Electronics

ANNA UNIVERSITY

DR.MAHALINGAM COLLEGE OF ENGINEERING AND TECHNOLOGY,POLLACHI

MAY

2017

8.28

B.TECH in Electronics and Communication

CALICUT UNIVERSITY

PALAKKAD INSTITUTE OF SCIENCE AND TECHNOLOGY, ATTAYAMPATHY

MAY

2015

7.26

CLASS 12

HSE

BRAMANANTHA SWAMI SIVAYOGI HIGHER SECONDARY SCHOOL, KOLLENGODE

MARCH

2011

75

CLASS 10

SSLC

YOGINIMATHA GIRLS HIGH SCHOOL,KOLLENGODE

MARCH

2009

85

AREA OF INTEREST

Digital system design

VLSI signal processing

Power electronics

TECHNICAL SKILLS

Design Tools :CADENCE EDA, Xilinx, Modelsim, Tanner EDA,MATLAB

Operating Systems: Windows XP, Windows7, Linux

Programming Languages: C,VHDL,Verilog

Applications: Microsoft Office

Digital Electronics designing

ACADEMIC PROJECT WORK

UNDER GRADUATION

MINI PROJECT:

Title : Brake Failure Indicator.

Description: This project mainly aims to avoid accidents caused by brake failure. This circuit design issues the early detection of brake failure.

MAIN PROJECT:

Title : Automatic Tollgate System Using GSM.

Description: This project mainly aims to avoid congestion in toll booths by auto payment of toll tax from the user’s bank account using RFID and GSM. Then the deducted amount will be sends in to the mobile phones as SMS.

POST GRATUATION:

Title : Modelling and simulation of multilevel inverter with reduced number of switches and DC Sources.

Description: By reducing the number of power electronic devices it will reduce area and cost.now it is an big challenge in the field of power electronic.

CO-CURRICULAR ACTIVITIES

Project undertook at RHYDO Technologies (P) Ltd. entitled “Automatic tollgate system using GSM” under the department of embedded research and development.

Attended workshop on “System Design Flow using Xilinx Vivado Design Suite on Zynq-7000 SoC Kit” organized between 27th & 28th of January 2016 at ASIC Centre of Excellence, Dr. Mahalingam College of Emgineering and Technology, Pollachi.

Attended the CSIR sponsored two day National level seminar on “ LIGHT FIDELITY (Li-Fi)- THE BRIGHT FUTURE OF 5G VISIBLE LIGHT COMMUNICATION SYSTEMS” at P.A. College of Engineering and Technology,Pollachi during 27th & 28th March 2017.

PERSONAL STRENGTHS

Hard worker.

Learn things quickly.

Negotiate effectively, friendly with others.

EXTRACURRICULAR ACTIVITIES

Story Writing, drawing, Painting.

Active member of organizing committee for various programs at school and college level.

PERSONAL DETAILS

Date of Birth : 01-06-1994

Father’s Name : Kamaludeen M

Sex : Female

Linguistic Excellence : Malayalam, Tamil, English

Marital status : Married

Nationality : Indian

Hobbies : Listening music, Drawing, Reading,Surfing Net.

PUBLICATIONS

International Organization of Scientific Research (IOSR) published the manuscript entitled “Modelling and simulation of single phase multilevel inverter with minimum power devices and DC sources”.

International Organization of Scientific Research (IOSR) published the manuscript entitled “Novel three phase five level inverter with reduced number of power electronics components”.

EPRA International Journal of Research and Development (IJRD) published the manuscript entitled “Single phase seven level PWM inverter with self voltage balancing capacitors”.

DECLARATION

I hereby declare that the above mentioned details are true to the best of my knowledge.

Date :

Place : Palakkad DEENU K

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