Embedded System

+91-950**-*****

****.*********@*****.***

pronadeepbora

Assam, India

SUMMARY

3+ years experience in the field of

Embedded Systems Design & FPGA-

based design.

Exposure to Embedded & FPGA-

based design project development

starting from preparation of design

document, hardware interfacing,

coding, unit & integration testing,

and including training delivery.

KEY SKILLS

Digital System Design

Verilog HDL FPGA Design

ARM Embedded C

Embedded Protocols

ADC / DAC Unit Testing

Training Delivery

Documentation

TECHNICAL SKILLS

CERTIFICATIONS

EXPERIENCE

FPGA Engineer Jul '20 - Feb '21

Lekha Wireless Solutions Pvt. Ltd.

Project: Antares - SDR Receive signal chain

RTL Design:

Hardware Development :

Trainee Engineer Feb '20 - Jun '20

Lekha Wireless Solutions Pvt. Ltd.

Training Modules:

Support:

Lab Engineer - SMDP C2SD Jul '16 - Jan '19

National Institute of Technology, Nagaland

Project: Air Quality Monitoring System

Teaching Responsibilities:

EDUCATION

National Institute of Technology, Nagaland Aug '14 - Jun '16 M.Tech. - VLSI System

Dibrugarh University Aug '09 - Jun '13

B.Tech. - ECE

PROFESSIONAL TRAINING

Embedded System Design and Automotive Feb '21 - Present Cranes Varsity

VLSI - SoC Design and Verification Mar '19 - Jan '20 Sandeepani, CoreEL Technologies Pvt. Ltd

PUBLICATION

"A Cost-effective Mobile Sensing System intended for Continuous Monitoring of Vehicular Emissions for Air Quality Monitoring Applications." presented in 5th IEEE Conference UPCON, 2018. DOI: 10.1109/UPCON.2018.8596872

WORKSHOPS

Bangalore, India

Bangalore, India

Dimapur, India

Dimapur,India

Dibrugarh,India

Bangalore, India

Bangalore, India

Pronadeep Bora

M.Tech. VLSI Systems

Languages: Verilog HDL,

Embedded C

Hardware: Xilinx 7 Series and

Ultra Scale FPGA & SoC, STM 32

Microcontroller

Design Tools: Vivado, Keil

uVision, Mbed, QuestaSim

Open Source Platform: Arduino,

Raspberry Pi

Protocols: SPI, I2C, UART, AXI

Stream

OS: Linux

NPTEL Online Certification -

Embedded System Design with

ARM - IIT Kharagpur

Xilinx Alliance Partner

Certification v2019.2 -

Designing FPGAs using the

Vivado Design Suite

Xilinx Certification - Designing

with Verilog

NPTEL Online Certification -

Hardware Modeling with Verilog

HDL - IIT Kharagpur

Worked on RTL design and unit-level verification of Channel Estimation, Phase Multiplier, DC Addition modules of Antares - SDR Receive signal chain Involvement in baseline build development and Tx/Rx path testing on customized Antares - SDR board

Worked on Clock Domain Crossing based design using Ping Pong & AXI Stream- based FIFO buffer and testing of ADC and DAC path on Xilinx RFSoC FPGA Provided physical support on hardware probing and in establishing remote hardware setup on various ongoing projects at the time of covid -19 pandemic. Preparation of project proposal and finalization of design specification Development of Microcontroller based prototype

Worked on FPGA-based sensor interfacing using XADC IP core in Xilinx 7 Series FPGA

Conducting Microprocessor & Microcontroller and FPGA-based design laboratory classes for B.Tech. and M.Tech. courses

CGPA/Percentage - 7.97/74.70%

CGPA/Percentage - 7.48/70.35%

Attended Xilinx Tools training course on Xilinx Vivado design flow including SDK, HLS, PR tools targeting Xilinx FPGA and Zynq SoC conducted CoreEL Technologies Partaken in 1-week FDP on “Digital VLSI” organized by EICT Academy IIT Guwahati Participated in GIAN course on “Scalable On-Interconnects for Multicore Systems” organized by IIT Guwahati

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