Hardware Engineer Design
Resume:
Ram Kumar’s Resume ***********@*****.***
Ram Kumar M
Education: B.E - Electronics and communication
College: National Institute of Technology
Mobile: 776*******
Email: ***********@*****.***
Six Sigma (6σ): Interposer Design for application-specific integrated circuit (ASIC) U.S Patent: 16/860965 --Standoff with temperature –variable electrical element. HARDWARE ENGINEER ~ HARDWARE DESIGN ~ SYSTEM ARCHITECTURE ~ SYSTEM ENGINEERING
Technical Expertise:
Around 14+ years’ of experience specializing in Hardware Engineering, System Architecture, Hardware Design, System Engineering and Project Management in the field of Aerospace, Defense, Telecom, Embedded, Digital and Data communication in developing complete Integrated Product development life cycle.
Experience in Aerospace, Telecom, Wireless, Automotive domain on complete product life cycle in Hardware Development projects.
Hands on design experience with Microcontroller (Power Architecture, ARM Cortex-M4F ) FPGA’s, High speed Memories (DDR2, DDR4) and various types of communication buses and protocols such as LVDS, SERDES, PCIe, USB, SATA, RS422, RS485,RGMII, I2C,SPI,CAN etc.
LTE – 3GPP Radio head design Board design with Virtex5-SXT- XC5VSX35T and XC5VSX50T to support DPD / DUC / DDC / CFR for 3G wireless base station initiation.
Signal integrity/Power integrity/ESD/EMI/Thermal design/PCB analysis performed with Mentor Graphics Hyperlynx/Expedition/DX-Designer/Allegro
ODM for Cisco Nexus 7000 series Switches and WAP – Wireless Access point design with Qualcomm chipset for 2.4G and 5G dual radios.
Medical Electronics – Boston scientific Communicator remote patient Management system ODM design for tracking patient health status.
All design requirements carried out like Requirements / design capture / Schematic / PCB layout / routing guidelines / ECO / Analysis / ATE / Production / Integration
Design of Network server module and Aspire-400 Satellite Data unit design and with DDR4/PCIe2.0 interfaced to power Architecture processor.
Design of Cart/ Mini rack Manufacturing Test Platform for Fabric/Spine card for ciscoN7K system, Designed 15 Gbps High speed interfaces, System reuse of software and FPGA.
Ram Kumar’s Resume ***********@*****.***
Complete product life cycle includes, Electrical/Mechanical chassis design/Thermal, High speed systems/Board design implementation for Microcontroller/ASIC / FPGA.
Experience in complete hardware engineering function includes System design, Digital hardware, PCB design, Mechanical, RF design and Test engineering and customer support.
Handled PCB layout design / Manufacture process for PCB- Assembly and worked extensively with cross team for functional validation
Extensively worked on Trouble shooting of circuit design in both Analog / digital using oscilloscopes / logic analyzers / Serial data analyzer / Spectrum analyzer testing and de-bugging of the hardware circuits
Well versed in sub-system design, power budgeting, De-rating analysis, PCB Layout supervision /Part selection and Evaluation and Manufacturing support
/ Cross team Functionality support.
Experienced in Integration design tasks of circuits and sub-assemblies into the top-level design. Reviews and retaining responsibility for system level designs
System design implementation for pre (FPGA) and post (ASIC) silicon Board validation. Played major roles in multiple prototype FPGA / ASIC for delivery of hardware designs.
Experienced in issue handling/tracking and driving to closure in a team environment
Management Profile:
Rich Engineering and Program management experience in large multinational corporations, proven track record of driving multiple product development life cycles with geo-dispersed teams as well as leading quality engineering, Rich Design and development background with hands on exposure & technical leadership and managerial supervision of teams; strategically focused with exceptional leadership skills & excellence in building high-performing teams; Leading change in competitive business environment; Strong exposure to Project management, Team management and Successful completion of several projects.
Technical SKILLS AND TOOLS
Schematic tools : Orcad 16.3, Allegro Concept HDL 15.2, Xpedition Vx.2.6
CAD tools : Cadence Allegro16.3, Mentor Graphics Expedition PCB.
Signal Integrity Tools : Hyperlynx 9.1
Test Equipment’s : Agilent 8960 wireless tester, IXIA Ethernet traffic generator, USB2.0 Tester, Agilent Infiniium Oscilloscope 12 GHz, N9020A MXA Signal Analyzer, N5182A.
Version control : DOORS, Bitbucket, Teamcenter
Ram Kumar’s Resume ***********@*****.***
Documentation tools : MS Project, Visio, Word, Power Point, Excel Managerial Skills Summary
Program Management & Project Management Team Skills Development Planning & Reviews
Planning and Tracking Requirement Analysis & Technical Specifications
Cross-functional Coordination Value Creation
Customer support and relationship management Proposals and Business development
Recruitment and Mentoring Scope, Estimation, Cost and Budget management
Delivery Management
Training and Development
.
Performance Appraisals
Escalation Management
Business development:
Lead and Participated in several business development activities such Proposal preparation, estimation, Cost and effort estimates., scoping the projects, RFP response, Business and capability Presentations, actively involved with technical discussion, and business negotiations.
TRAINING/CERTIFICATIONS/SEMINARS
Several Integrated Project Management and process training
CERT DO-160 Test procedure and Test Report
Design for Six Sigma ( DFSS) Hardware
EMC/EMI compliance Design and testing
Participated in various chipset and tool vendor seminars
Training on team building activities
Experience Profile
Honeywell Technologies Solutions: Canada / India Apr’2017 …till date Role: Sr. Advanced Hardware Engineer
Role: Associated with Systems Engineering Group in the role of Sr. Advanced Hardware Engineer
Responsibility includes Requirements identification and capturing, Architecture and Design, Design Concepts, Schematics review, Preparing Design documents and Design analysis reports (DVT, Thermal Analysis, Reliability analysis etc), Defining inputs to Mechanical team, PCB layout design team, System’s BOM preparation, Systems Assembly preparation, planning for Acceptance and Qualification tests, Client Ram Kumar’s Resume ***********@*****.***
interaction, Planning and execution. Interaction with various cross functional areas and divisions like PCB design and fab, procurement etc… Project1: Aspire400- Satellite Data unit
Project2: Network server module
Roles and responsibilities:
Define Scope of work and understand System requirement specification
Traceability between SysRD, HRD, DVT for Product requirements
NXP Processor/DDR4/Network interface controller/Ethernet Switch/SATA/UART/Backplane interfaces
Process execution on Plan/Design/Check phases for Preliminary Design Requirement and Critical Design requirements
System Architecture with Derived requirements and Design
Schematic review, Layout review, Power budgeting, BOM score Analysis
Mechanical Analysis, HUE requirements, Thermal analysis, Reliability analysis, EMI/EMC Design
ATP, QTP, Functional checkout Verification and Validation
System Integration and DO160 Testing as per RTCA
PCB Assembly, Unit Assembly as per DTC with vendors Infosys Technologies Ltd: Feb’2012…Mar’2017
Role: Lead Consultant Engineering
Role: Associated with Product Engineering Group in the role of Lead Technical consultant
Responsibility includes Hardware design, system engineering, technical solutions proposal preparation, Program Management, Requirement capturing, Planning and Execution, Client interface, Problem solving and resolutions, Interaction with various cross functional areas and divisions, Interfacing with manufacturing team for production of the product, Hardware Process definitions, Team management, Recruitments and Mentoring.
Project1: Cisco - Nexus7K MTP-1 design for Fabric card Projec2: Cisco - Nexus7K MTP-2 design for Spine card Roles and responsibilities:
Cisco N7K Debug fixture design to support Maximum count of the UUTs for Cart development.
Ram Kumar’s Resume ***********@*****.***
The project was executed in four phases such as Architecture/Concept Design, Layout, Thermal Analysis, and Mechanical Design.
P1 and P2 phase like Requirements & Architecture, Schematic and Layout Design, Thermal Analysis, Mechanical Design for Bench top/ Rack Systems
System Architecture/ PRD/HFS on Manufacturing Test Platform on Reusability/ Design fit /Variants/ Debug fixture/ Chamber fitments.
ASIC Pre-SI Analysis for 15G signals with stackup of 22 layers with complete Analysis with PCB manufactures
Routing analysis / Back drill process/ Valor checks/ Thermal simulation/ SI Analysis performed on system level model with PCB fitment Analysis size not to exceed the manufacturability of 33”.
Key design concept, UUT/ Midplane/ Loop back card design with 15 G High speed interfaces.
Test systems of UUT testing for Test Rack and Mini Rack Designs. PowerwaveTechnology Ltd: Dec’2008… Feb’2012
Role: Senior System Engineer
Project: LTE – 3GPP Radio head design
LTE – 3GPP Radio head design platform concept is driven by the requirement to have a
‘one size fits all’ Digital and RF board to cover all future radio head design products. Hardware Board design involves Xilinx Virtex-5, SXT family using both 50T and 35T for 1T/1R application.
Key Roles and Responsibilities:
High-speed board with Digital + RF interfaces for LTE – 3GPP for 20MHz instantaneous BW. A single digital board allows 2T2R and can be configured as Master/Slave, allowing two cards to be combined for 4T4R systems.
Board design with Virtex5-SXT, XC5VSX35T and XC5VSX50T to support DPD / DUC / DDC / CFR for 3G wireless base station initiation
3GPP LTE (Long term Evolution) System level analysis –specification / Validation / integration
CPRI (common public radio interface) interface using Virtex-5 Rocket-IO GTP transceivers provide access from integrated bit error ratio tester
(IBERT).
Integration design tasks of circuits and sub-assemblies into the top-level design Reviews and system level designs.
RISC Microprocessor Freescale MCF5208 / SDRAM / Flash.
10/100 AMD PHY based Ethernet Port / RS232 / SPI / I2C / clock. Ram Kumar’s Resume ***********@*****.***
Virtex-5 Multiple Slave Device Configuration on an 8-Bit Select MAP Bus
DDR2 Memory interface using Micron MT47H32M16.
Integrate RF interfaces - TX path, RX path, OBS path using IQ- DAC / ADC / OBSADC.
Layout guidelines / Parts selection / Evaluation / Validation and Documentation.
All design requirements carried out like Specification/ design capture / Schematic / PCB layout / routing guidelines / ECO / Analysis / ATE / Production / Integration .
Moschip Semiconductor Technology Jun’2005…Dec’2008 Role: Hardware Design Engineer
Project1: MCS9990 - PCIe to 4-port USB controller
Project2: MCS7840 - USB 2.0 to Quad / Dual serial port Project3: MCS9901 - PCIe to Serial, Parallel, USB application Responsibilities include:
Board Design on FPGA and ASIC System level analysis for the project from validation to silicon
Signal integrity analysis, Timing Analysis to Design Boards with different flavors of applications for pre and post silicon validation and Customer Evaluation kits.
Pre-silicon FPGA Virtes-5 LX110T validation on USB2.0- ISP1504 PHY, PCIe PHY interfaced to UART, RS232, RS485/RS422
Post-silicon ASIC validation on MCS7840 / MCS7820 for functional verification.
USB –IF Certification process for MCS7840 / MCS7820 ASIC silicon with USB2.0 ports using ISP1504 PHY
Personal Details
Sex : Male
Languages Known : English
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