Jigang Zhao

Phone: 510-***-**** • Email: admuuf@r.postjobfree.com

SUMMARY

• 15+ years of experiences in AMOLED and TFTLCD display industry in panel design, process R&D, process integration, design layout, and mass production process development and verification;

• End-to-end LCD display product development experiences with a track record of successful product launches;

• Proven experiences and technical knowledge of flexible display R&D, process integration, process verification, and mass production introduction;

EXPERIENCE

2013 - Present Royole Corporation Senior Integration Engineer Fremont, CA

• Developed AMOLED flexible display Array technologies based on amorphous metal-oxide TFT, established new process of hybrid Etching-Stop structure and organic PLN structure, optimized the layout of pixel design and process flow, introduced to mass production line;

• Integrated design and process of new products to analyze failures and optimize the process to successfully increase product yield.

• Led to define the design rule for R&D products including flexible OLED display product, QDCC display test device, stretchable LED product, LTPO, and to generate and optimize panel design layout;

• Characterized and developed high mobility amorphous metal oxide single layer and multiple layer structures, analyzed test data to significantly improve process and device performance;

• Initiated design to build a variety of flexible display test equipment prototypes, applied to mass production line and achieved one million dollars in savings;

• Won Royole Patent Master Award and The Best Patent Award in 2018; 2004 - 2010 Beijing BOE Optoelectronics Technology Co Ltd Beijing, China R&D Integration Manager

• Led the development of 26” LCD TV panel as product manager, managed project schedule and drove execution among cross-function teams to define technical specifications, verify product design and introduce to mass production;

• Supervised R&D product process flow and reliability test, ensured product performance, conducted failure analysis, verified design and mass production ability for 17”, 19”, 19”W, 21.5” and 26” series;

• Performed design-related failure analysis and developed corrective actions on design and process to drive up mass production yield and improve product performance;

• Ensured new product introduction to clients, analyzed key accounts’ feedbacks on product issues, examined the failures and proposed corrections to enhance product quality; Process R&D Manager

• Developed new process and designed new mask for 4Mask technology, Gray Tone Mask technology and FFS technology, conducted DOE and data analysis, verified Array process and mask design, and introduced to mass production;

• Led R&D product process development on 15.6”, 17”, 19”, 20.1” and 26” FFS products, including process spec definition, recipes generation and mass production introduction;

• Analyzed Array process failures and optimized process parameters to improve mass production yield;

• Provided technical guidance and qualification standards on strategic supplier selection, co-developed with suppliers on new technologies to enhance product performance;

• Participated in the process development and lighted up the first 17” LCD module in China’s first G5.5 TFT-LCD production line in 2005;

• Achieved the second prize of Beijing Science and Technology Award for the R&D of 4Mask technology in 2008; 2003 - 2004 BOE Hydis R&D Process Engineer Icheon, Korea

• Developed Array process for R&D products, conducted tests and experiments to define process parameters, executed process tests and failure analysis;

• Collaborated with global teams in Korea and China to introduce TFT-LCD display technology to China, supported to set up the first G5.5 TFT-LCD production line in China and build local Array process R&D team; EDUCATION

Oklahoma State University Stillwater, OK

Master of Science in Physics, May 2013

Beijing Institute of Technology Beijing, China

Master of Science in Physics, March 2003

Bachelor of Physics, August 2000

CERTIFICATES

6Sigma Green Belt Certification

PUBLICATIONS AND PATENTS

Papers:

Jigang Zhao, el al, “The application of nanowires and nanotubes in logical circuit”, Microelectronic Technology, Vol.31, No.2, April 2003.

Jigang Zhao, el al, “The electric properties of GaAs Schottky diode containing InAs self-assembled quantum dots”, Acta Physica Sinica, Vol.51, No.6, June 2002.

Jigang Zhao, el al, “Characterization and development of nanodevices”, Physics, Vol.31, No.1, January 2002. Patents (Granted 27 Patents in US, CN, JP, KR):

No. Patent Name

US10163998B2 TFT Array Substrate Structure Based on OLED (Granted in US, JP, KR) US10733949B2 GOA Circuit, Array Substrate and Display Device (Granted in US, CN) US9698173B2 Thin Film Transistor, Display, and Method for Fabricating the Same (Granted in US, CN, KR) US7851806B2 Thin Film Transistor Liquid Crystal Display Array Substrate and Manufacturing Method Thereof

(Granted in US, KR, JP)

KR102104289B1 Flexible Anzeigtafel

JP6752354B2 Array Substrate and Manufacturing Method for Array Substrate CN107438903B Method for Manufacturing Thin Film Transistor CN100592181C TFT-LCD Array Substrate (Granted in CN, KR, JP) CN209281791U Array Substrate and Foldable Display Screen for Foldable Display Screen CN207832585U Bar Folder

CN101770122B Thin Film Transistor Liquid Crystal Display (TFT-LCD) Array Substrate as well as Manufacturing Method and Test Method Thereof

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