Navaneetha Morusu

D.NO:*-*:Dadithota(D), mail:adkcq1@r.postjobfree.com

Tadimarri(M),Anantapur(D),AP-515631. Mobile:799-***-**** OBJECTIVE

To seek a challenging position in a reputed organization which provides a platform to learn and grow with it consistently and utilize my leadership qualities, technical skills and interpersonal abilities.

ACADEMIC DETAILS

TRAINING EXPERIENCE

Being Trained as an ASIC Design and Verification Engineer at QSOCS Technologies Pvt Ltd., Bangalore.

TECHNICAL SKILLS

HDLs : Verilog.

HVL : Methodology : System verilog, UVM

Programming Languages : C, C++(basics)

Platforms : Windows, Linux (basics)

Simulators : Aldec riviera pro, iverilog.

Other Skills: Static timing analysis (STA), Debugging, RTL Verification. PROJECTS

Project 1: Design and verification of asynchronous fifo. Language: verilog HDL

Tool: ALDEC rivera pro

Description: Asynchronous fifo is used as an interface between two blocks operating in different clock domains to avoid the data lose. The data is written into the fifo from one clock domain and it is read from another clock domain. Asynchronous fifo architecture is developed based on the following parameters write and read clock frequency, burst length and burst size with idle cycles. This generates the status flags like full, almost full, empty, almost empty conditions.

Course Institute/University Year of passing Percentage/ GPA

Bachelor of Technology

Malineni Lakshmaiah

Engineering

College,JNTU-Kakinada

2019

75.15

Board of Intermediate

Education

SLN junior College 2015 86.3

Secondary School

Certificate

ZP high School,Dadithota 2013 9.2

Responsibilities:

• Understand the asynchronous fifo specifications.

• Developed internal blocks of asynchronous fifo and verified in verilog.

• Integrated internal blocks of asynchronous fifo and verified in verilog. Project 2: Verification of AMBA-Advanced High Performance Bus AHB Lite Protocol. Language: UVM

Tool: ALDEC Rivera Pro

Description: AMBA AHB-Lite addresses the requirement of high performance synthesizable design.It is a bus interface that supports single bus master and High Bandwidth operation. Responsibilities:

• Understood the AHB protocol specification.

• Prepare design verification plan based on design specification.

• Developed slave logics to drive by the master.

• Creative test cases to ensure maximum coverage.

• Verification by running test cases and collected responses from the DUT and compared results With the expected values.

Project 3: Verification of AMBA-Advanced Peripheral Bus APB protocol. Language: System Verilog,UVM

Tool: ALDEC Rivera Pro

Description: : It provides a low-cost interface that is optimized for minimal power consumption and reduced interface complexity. The APB interfaces to any peripherals that are low-bandwidth and do not require the high performance of a pipe lined bus interface. The APB is un-pipelined protocol.

Responsibilities:

• Understood the APB protocol specification.

• Prepare design verification plan based on design specification.

• Developed slave logics to drive by the master.

• Creative test cases to ensure maximum coverage.

• Verification by running test cases and collected responses from the DUT and compared results With the expected values.

ACADEMIC PROJECTS

TITLE:Brain Tumor Classification From MR Images Using Neural Network and the Central Moments.

ABSTRACT:In the context to medical images classification,we proposed a novel method for the classification of Magnetic Resonance(MR) images of the brain.the proposed system is based on the use of a new method for the feature extraction. TOOL: Matlab

INTERNSHIPS

• Completed 3 Months internship on Matlab Programmer. EXTRA CURRICULAR ACTIVITIES

• Participated in National Service Scheme.

• Participated web casting duty in 2019 AP Election duty. KEY SKILLS

• Good interpersonal skills and strong team collaboration.

• Quick learner and passionate about working.

Declaration: I hereby declare that all the above details are correct and best of knowledge and belief. Date: Navaneetha M

Place: Bangalore

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