POOJA CHITAKOTI

One year two months experience in Samsung Semiconductor R&D (SSIR)

adjtiu@r.postjobfree.com

+917*********

SUMMARY

To pursue a challenging career and be a part of progressive organization that gives me scope to enhance my knowledge and utilize my skills towards the growth of the organization.

Professional Experience

Organization Location From To Designation

(Role)

Samsung

Semiconductor

Institute of

Research(SSIR

Software)

Bangalore,

India

28th

Oct,

2019

31st

Dec,

2020

Senior Associative

Engineer

EDUCATIONAL QUALIFICATION

Degree/Examination Board/University Year of Passing Percentage BE P D A E (VTU) 2019 CGPA (7.67)

PUC MUKTHAMBIKA

GIRLS PU COLLEGE

2015 89

SSLC H K E S (SB) 2013 82.72

CERTIFICATIONS/ TRAININGS

• Completed SOFTWARE TESTING training in QSPIDERS Bangalore.

• Completed Basic and Advances online course of Embedded System from Udemy.com

TECHINICAL SKILLS

• Programming Languages known: C, Embbeded C, core java

• Testing Skills: Manual Testing, Selenium

• Platform : Android

• Bug tracking tools : JIRA

• Other tools: Beyond compare, Jenkins, Source insight core java :

Good knowledge on OOPS concepts .

Method overloading and Method overriding.

Having good knowledge in Abstraction and Encapsulation, Constructors, Interface.

Good knowledge in Up casting and Down casting.

Good knowledge in Exception handling

Manual Testing :

• Proficiency in Software testing.

• Good knowledge in SDLC, STLC

• Good in Smoke, Functional, Integration, System testing.

• Very good knowledge of white box and Black box testing-Smoke, Functional, Integration, System, Performance, Compatibility, Adhoc testing. Selenium :

• Good Knowledge in WebDriver & WebElement Methods

• Knowledge in Locator

• Good in writing Xpath

• Good Knowledge in Drop down Controls

• Good Knowledge in Window Handling Concept

• Good in Framework Concept

• Good in writing Test script

Work Experience

Organization : Samsung Semiconductor India R&D

Team : Cellular RF Platform

Role : Senior Associative Engineer

Roles and Responsibilities :

Block1 :

• 1.2 years of experience as Senior Associate Engineer in Embedded software devlopment .

• Responsible for porting and Integration of RF code to customer specific branches and manage them across various multiple code repository.

• Gained a proficiency in error debugging techniques .

• Experience in building and compiling the software code to support different models with a suitable build commands .

• Gained basic understanding in ET ( Envelope Tracking ), Radio Frequency .

• Performed RF calibration and testing on different Radio Access Technology . Block2 :

• Working in development activities of the project.

• Experience in software code optimization .

• Good knowledge on Software Development tools like Perforce, jira, Source Insight, jenkins and Testing tools .

ACADEMIC PROJECT

Project Name: : “Graph-Based Transistor Network Generation Method for Super gate Design”

Description: Transistor network optimization represents an effective way of improving VLSI circuits. This method described an efficient graph-based method to generate optimized transistor (switch) networks.

Tools: vlsi, dsch3

TECHINICAL SKILLS

• Programming Languages known: C, Embbeded C, core java, Basic Python

• Testing Skills: Manual Testing, Selenium

Other Skills

• Problem solving

• Debugging

• Aware of Technologies 1G, 2G, 3G, LTE

• Team Player

Field of Interests

• Digital electronics

• VLSI

• RF ( Radio Frequency )

• Wireless communication

PERSONAL PROFILE

Father’s name : Kashinath

Mather’s name : Savitri

Nationality : Indian

Date Of Birth : 05/jan/1998

Languages spoken : English, Kannada, Hindi.

Hobbies : Playing Throwball

DECLARATION:

I hereby declare that all the information mentioned above is true to my knowledge and I bear the responsibility for the above mentioned particulars. Date:

Place: Bangalore Pooja

K C

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