Steven Cornelia

*** ******** ***.

Bayshore, NY 11706

631-***-****

adjn5o@r.postjobfree.com

EXPERIENCE

CAD Experience

Cadence Allegro 17.2, Design Entry HDL, OrCAD, Pantheon, AutoCAD, Outlook, Word, Excel, PowerPoint, Cam350, Blueprint, valor, PADS

Work Experience

Principle Design Specialist B.A.E

1/2019 to 11/2019

• PCB design using Allegro Cadence constraint manager for DDR3 and 4 Memory Routing Techniques

• Complete Constraint Manager set up: Pin pairs, Matched groups, Relative Delay, Buses, Differential pair

• 1553 data bus constraint keepouts

• Creative Switching Power Supply routing and shape Techniques

SR-Designer

Microsoft

6/2018 to 12/2018

• HDI High Speed Multilayer Digital / Analog /Mother board Designs / Constraint driven Layouts

• Constraint Manager: Electrical rule set (reflection, timing, crosstalk) High-Speed Option Micro-via and associated spacing, stacking, and via-in-pad rules Miniaturization Option Constraint Manager: Region rules, Differential pair rules, Properties and DRCs, Physical, spacing, and same net rules. Allegro Design Entry CIS. Blind and buried, stacked via Structures, Accurate Cross section definitions

• FPC DESIGN stack-ups and zones with INTER LAYER spacing constraint knowledge for design for manufacturability streamlining.

SR-Designer

DATA DEVICE CORPORATION

2008 to 2017

• Recruited as lead Designer to coordinate design requirements and department work load, using and electronic scheduler.

• Evaluate current S.O.P and update per NEW release cycle.

• Recruited for Hybrid circuit design, using materials provided in satellite communications, guidance systems.

• Involved in earlier stage design proposals to ensure scheduling and design for manufacturing.

• Recruited for designing for HDI (High Density Interconnect)

• Design knowledge of Class 1 General Elec Prod., Glass 2 Dedicated Service Elec. Products and Class 3/3A High Reliability Elec. Products per IPC Standards.

Design Specialist

SYMBOL TECHNOLOGIES/MOTOROLA/ZEBRA

2006 to 2008

• Recruited for implementation of RoHs (Restriction of Hazardous Substances) materials.

• Interface with engineering and component engineering for part selection or RoHs compliance.

• Redesign existing Printed Circuit Board designs for RoHs compliance.

• Recruited for designing for HDI (High Density Interconnect).

SR-Designer

MODULAR DEVICES INC

2005 to 2006

• Recruited for designing POWER SUPPLY.

• Design and construction to military, commercial and aerospace requirements

• Designed for Test and Manufacturing Engineering constraints

• Set up and maintain library symbols for Power Pcb (PADS) and Power logic.

SR-Designer

SYMBOL TECHNOLOGIES

1997 to 2005

• Recruited for designing for HDI (High Density Interconnect).

• Multi-layer high density double sided digital and analog smt boards and flexes for scanner products

• Designed for Test and Manufacturing Engineering constraints

• Design for High speed, Transmission lines & micro strip, Stripline and Diff pair, Stack-Ups and Planes

Impedance control and Reflection.

• Setting up accurate Design rule checks for all types of circuitry.

Designer

LOCKHEED MARTIN

1994 to 1997

• Recruited for electrical designing of p.c. boards and knowledge of ALLEGRO.

• Upgraded and revised p.c. boards for new software.

• Designed for Test and Manufacturing Engineering constraints

• Designed boards for Microwave crystal receivers for satellites, avionics, ground Communications.

Draftsman/Designer

LORAL SPACE 1984 to 1994

• Recruited for electrical design of p.c. boards for military and commercial requirements.

• Designed for power supply technology.

• Used ALLEGRO unix based system to upgrade old library parts and p.c. boards

• Trained others on the usage of ALLEGRO for p.c. board design and packaging

EDUCATION

●Island drafting and technical institute

1991-1993

Associates degree

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