SANJANA K .S

DOB:**-**-****

M.Tech.Electronics and Communication Engineering University Visvesvaraya College of PG(II Year IV Semester) Engineering

Contact No:+91:968-***-**** K.R Circle,Bangalore

Email: adj5gv@r.postjobfree.com

Registration No:18GAMD3017

Area of Interest

VLSI and java Developer

Education

Year Degree/Examination Institution/Board CGPA/Percentage 2020 M.Tech(ECE) Uinversity Visvesvaraya College of Engineering,Bangalore 7.8(70%) 2018 B.E(Elec & Comm Eng)

K.S Institute of Technology,Bangalore 71.39%

2014 P.U.C Vishwamanava Composite PU College,Mandya 84.50 % 2012 S.S.L.C K.Jogi Gowda High School,Koppa 84.96% Projects

Design of Low Power Area Efficient 2-4 Mixed Logic Line Decoder UVCE Bangalore Oct 2018-Ongoing

• The concept is basically on mixed-logic design for line decoder that is designed by connecting transmission gate logic,pass transistor dual-value logic and static CMOS. Conventional techniques use static CMOS circuit to implement the design.However the power dissipation is observed to be high and the primary reason behind rise in power would be the number of transistors used henceforth. The proposed decoder can operate at low supply voltage and it finds it’s space in low power applications.

Power Theft Detection in Agriculture and Field Protection KSIT Bangalore Feb 2018-June 2018

• Power theft is a big challenge that has been accomplished in many countries.This has negative effect on a national economy. Agriculture provides food requirements to people and also provides raw materials for industries. Because of animal interruption in fields there is huge crop loss. To avoid these losses it is very important to secure from animals. We have developed a system which can detect electric power theft and field monitoring technology for animals.

Internships & Training programs

Company Name Duration Designation Hands on Knowledge Remidio Innovative solutions

Pvt.Ltd

August 2019-January 2020

(5 Months)

QA Engineer

Intern PCB boards

inspection,Root cause

analysis & trouble

shooting of pcba boards

ITI Limited

January 2017

(15 Days)

Training

program Telephone

products,switching access

products,R&D and QA

Skills

• Computer Languages known:C,Java,Python.

• Certifications:a)Evolution of Air Interface towords 5G from NPTEL Swayam portal. b)Hands on workshop on Fundamentals of artificial intelligence.

• Hardware Description Language: Verilog, system Verilog.

• Architectures: Micro processor 8085,Microcontroller 8086.

• Matematical tools: MATLAB.

• Hardware expertise: Altera FPGA board, Feko+ winprop 2018 software. Workshops attended/Papers presented

• Have attended a MSP430 (2 day work shop) on how to visualize and design a micro-controller and also studying the performances regarding the same at KSIT,Bangalore.

• One day workshop on Research Methodology Induction & Intellectual property rights (RMI & IPR) at Jnana Bharati Campus(BU).

No of a Papers presented:1

Paper Title:“Introduction To Finfet Technology-Scope,Applications And Challenges” Presented at: At National conference on Recent trends and Applications in Electrical and Electronics Engineering held at K.S Institute of Technology on may 10th-12th, 2017. Abstract of the Paper:Considering the difficulties in planar CMOS transistor scaling to secure an acceptable gate to channel control FinFET based multi gate devices have been proposed . it gives high performance logic adapted thus device and will continue to use it for several generations in to the future. References

Dr.B.Sudarshan Dr.B.K Venugopal

Asst Professor,Dept of E&C Engineering,KSIT,Bangalore Asst Professor,Dept of Electronics and Communication Engineering,UVCE,Bangalore

Declaration

I,SANJANA K S,hereby declare that the information contained here is true and correct to the best of my knowledge and belief. SANJANA K.S

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