Software Python

HARSH D. PANCHAL

Harsh .D. Panchal

M.Tech (Embedded and VLSI system Design)

Bungalow no. 1, Vanita park society, behind Ashirwad palace, Bhatar road, Surat-395017

+91-851**-***** *****.**********@*****.*** LinkedIn: HARSH PANCHAL Career Objective Seeking a challenging position in an organization that gives me an immense scope to update my knowledge and skills in accordance with the latest technologies and to take a crucial part in the development of an organization.

Skills Software Knowledge: Xilinx ISE, Icarus Verilog, ATMEL STUDIO, Arduino IDE, Proteus, Xilinx Vivado (IP core designing), Visual Studio Code (JavaScript basics). Hardware Knowledge: AVR microcontroller, Arduino.

Languages: Verilog HDL, C, C++ (oops concepts), Python, System Verilog basics. Subject Interest: Digital Electronics, Digital System Design Using Verilog, VLSI, AVR Micro-controller.

Projects Designing of IP core using Xilinx Vivado (Webpack

version) (Master’s program)

RESPONSIBILITIES

• Understanding of what is IP (Intellectual

Properties).

• Understanding of Xilinx software.

• Referred some research papers.

• To implement the whole hardware part in

software.

• To debug the errors of peripherals connections.

• To the learn the system Verilog language for

programming part.

Technologies

• Language: System Verilog.

CSPIT, Changa

March, 2020

HARSH D. PANCHAL

• Software: Xilinx Vivado (Webpack), EDA

playground.

Portable ECG device using Bluetooth & android application (Bachelor’s program) CGPIT, Bardoli RESPONSIBILITIES March, 2018

• Monitoring ECG of patients with portable hardware

• Interfacing Bluetooth module

• Wave generation using MATLAB

Technologies

• Language: Arduino C

• Software: MATLAB, Arduino IDE, MIT app inventor

• Hardware: Arduino UNO

LED Applications (Diploma Studies)

RESPONSIBILITIES

• Designing hardware for various applications

Technologies

• Language: Arduino C

• Software: Arduino IDE

• Hardware: Arduino UNO, Thermistor

NIRMA, Ahmedabad

March, 2014

Automatic Conveyer (Internship program)

RESPONSIBILITIES

• Designing core for the conveyer.

• To set the motor speed according to requirement.

• Start and stop sensors installation.

Goldi Green Technologies Pvt Ltd, Surat

March, 2014

Education Chandubhai S Patel Institute of Technology (CHARUSAT UNIVERSITY) M.TECH IN EMBEDDED AND VLSI SYSTEM DESIGN

• SGPA: 9.18

Changa, Anand

4th Pursuing

C.G.P. Institute of Technology (UKA Tarsadia University) B. TECH IN ELECTRONICS AND COMMUNICATION

• CGPA: 5.96

Bardoli

July2014-April2018

Nirma University

DIPLOMA IN ELECTRONICS AND COMMUNICATION

• CPI: 6.8

Ahmedabad

July2011-March2014

Shardayatan School, Gujarat Board

SECONDARY EDUCATION, S.S.C

• Score: 70%

Surat

July2010-March2011

HARSH D. PANCHAL

Internship Production Intern

RESPONSIBILITIES

• To get the knowledge of raw materials used

in solar panels

• Manufacturing process of making panels

• Done the job on making solar panel

manually.

GOLDI GREEN TECHNOLOGIES PVT. LTD.

Surat

FEB.- MAR. 2014

Extracurricular Activity Workshop: CISCO Networking

CGPIT, Bardoli

27-28 Feb, 2016

Workshop: Network and Cyber security

CGPIT, Bardoli

06-08 Oct, 2016

Workshop: Arduino Programming

CGPIT, Bardoli

21 Sep, 2017

Workshop: Internet of Things, Micro python and Raspberry Pie CGPIT, Bardoli

9-13 Jan, 2018

Declaration I hereby declare that all the above details are true. Date:

Place: Surat, Gujarat

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