LAVANYA GONDRALA
Email id- adj0rq@r.postjobfree.com
Mobile - +91-934*******
Seeking a challenging career in a reputed company where I can harness my skills, making significant contribution to the growth and development of the company and also develop myself.
Qualification
Board /university
Year
Percentage
B.TECH (ECE)
Chirala Engineering College, Chirala.
2015-2019
71%
Intermediate
Royal Junior College, Martur
2013-2015
79.6%
SSC
Z.P.H School, Dronadula
2008-2013
72%
Got second prize for Technical Quiz in Chirala Engineering College
Got second prize for Circuit Debugging in Chirala Engineering College.
Got second prize for doing Power Point Presentation on the topic Smart world in Chirala Engineering College
Got appreciation certificate for doing Power Point Presentation on the topic Google glass in RVR&JC college
Confident and Hard working
Quick learner.
RTL design trough FPGA
Verilog designing
Operating Windows
C#
ASP.Net
Mat lab
Verilog
SQL server
I had done my BTECH project on VLSI designing.
Title: Multiple Constant Multiplication Algorithm For High Speed And Low Power Designing
Environment: Verilog, Booth Multiplier, Carry Save adder
Description: By using this to design a 16-bit FIR filter which decrease the area and increase the speed of the filter and increase the overall performance of the system.
Name : G. Lavanya
Gender : Female.
Date of birth : 19 July 1998.
Marital status : Unmarried.
Nationality : Indian.
Languages known : English and Telugu.
Address : 1-36/c, Dronadula, Martur (Mandal), Prakasam (District).
Hobbies : Listening to Music and Playing Shuttle.
I hereby declare that all the information furnished above is true to the best of my knowledge.
PLACE: SIGNATURE
DATE: G.LAVANYA
CAREER OBJECTIVE
EDUCATION
ACCOMPLISHMENTS
STRENGTH
TECHNICAL SKILLS
PROGRAMMING SKILLS
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