MASTER’S in Electrical and Electronics Engineering at New Mexico State University 2019 – 2020.
Graduated on 11 December 2020 with GPA is 3.8
BACHELOR OF TECHNOLOGY in Electronics and Communication Engineering 2014 -18.
82.28% overall percentage.
HIGH SCHOOL under board of intermediate education, Andhra Pradesh 2012 -14.
96.6% with Mathematics, Physics and Chemistry as major subjects.
Languages: MATLAB, VHDL, Verilog, C, R.
Tools: Xilinx ISE, Xilinx Vivado, TASAM, Mentor Graphics, Cadence spectre, EAGLE, LTspice, TOPspice, Multisim, Simulink, SAM, Allegro PCB Designer, Cadence NCLaunch, RTL compiler, SOC encounter, Keil mVision, Digilent Adept, Hyperterimal, Digilent Nexys4.
Basic Linux Programming, TCL.
Can handle Electronic Lab measuring equipment like Oscilloscope, Function generators, Power supplies, DMM.
Strong basics in semiconductor devices like diodes.
PCB Design for DPLL – EAGLE.
Implementation of Low Supply Voltage Fully Differential Non-Inverting Amplifier – Cadence spectre (only done simulation).
Designed a 3kw Residential PV System using microinverters – SAM.
oLocation: India, Amravathi.
oPV panels make and model: LG Electronics inc. LG210P1C-G2.
oOrientation – Fixed, tilt=20º.
oInverter make and model: LG Electronics inc. A005KEEN261[240V].
oNumber of PV modules used = 15 (in series), only one subarray (strings in parallel =1).
Transmission and Detection of a Digital Image (with and without employing error correction) using BPSK through AWGN channel – MATLAB.
Customer segmentation using clustering – RStudio.
Objective: Observe marketing newsletters and transaction level data from customers and to formulate future offers.
Explored the modelling features of Simulink when studying RADAR system modelling – Simulink.
ASIC Design for SPI Interface.
Design of Low Power based VLSI Architecture for Constant Multiplier –Verilog.
Objective: This project mainly focused on developing a software program to perform multiplication which consumes less power.
Modified Wallace Tree Multiplier using Efficient Square Root Carry Select Adder – Xilinx ISE.
Objective: This Project aims at minimizing the area requirement of the hardware multiplier used in electronic devices.
Design of Finite State Machines like Elevator Controller, Turnstile, Shift Registers, Counters, Seven Segment Display, MUX –Verilog.
Design of various types of Current Mirrors like Basic, Cascode, Cascode with batteries, High accurate Cascode – Cadence spectre (0.18um CMOS Technology).
oStudied the Input Impedance, Output Impedance, Total Harmonic Distortion, B.W parameters in detail.
Common source Amplifier design with resistive load, active triode load, diode connected NMOS/ PMOS load, Current Mirror Load – Cadence spectre (0.18um CMOS Technology).
oLoad Capacitance =10pF, Voltage gain=10 V/V.
oMeasured Gain, Transconductance, B.W parameters of each.
Differential Amplifier design with resistive, current mirror loads – Cadence spectre (0.18um CMOS Technology).
oMinimum B.W= 20MHz, Nominal differential gain = -10v/v.
Simulation of Telescopic, Current mirror, Folded Cascode One Stage op-amps – Cadence spectre (0.18um CMOS Technology).
oGain Bandwidth product = 30 MHz, load Capacitance = 5pF, supply voltages are +/– 0.9V.
Fully Differential two stage (Miller op-amp) using one stage op-amp (floded cascode) as first stage and free class AB as output stage – Cadence spectre (0.18um CMOS Technology).
oGain Bandwidth product = 50 MHz, load Capacitance = 5pF, supply voltages are +/– 0.9V.
3-tap and 5-tap Equalizer – MATLAB.
Plotted Bit error probability vs Eb/N0 of antipodal, unipolar signals; Bit error probability vs Eb/N0, symbol error probability vs Eb/N0 of QPSK in AWGN channels – MATLAB.
Compared energy production of a flat-plate fixed-tilt stationary PV panel and a two- axis tracking panel for a full year – EXCEL.
oLocation: Las Cruces, NM.
oAssumed perfect tracking mechanism, perfect clear days.
Transient simulation of Level sensitive Static, Dynamic Latch and Edge-triggered static, dynamic latch – LT SPICE (0.18um CMOS Technology).
Single Diode Rectifier designed for 170V AC input, 170V DC @ 1A output – LT SPICE.
oIdeal diode, Load capacitance=10mF with 10mΩ internal resistance.
Using Silicon Controlled Rectifiers (SCR) vary the output average current form 8-12A – LT SPICE
oInput 120 & 240Vrms, 60 Hz.
oThe output current must have a peak-to-peak variations of no more than 2.5A.
LT SPICE simulation for Sinusoidal Pulse Width Modulation using a comparator
o Triangle, Sine waves as input
o sine wave frequency of 60 Hz and for various amplitude, frequency modulation index values.
DC-DC Boost convertor, DC-DC Buck convertor, DC-DC Buck/Boost convertor – LT SPICE.
Design of Ground-based radar for Search and Detection – MATLAB.
oTo detect an aircraft and a missile with average radar cross section of 6 dBsm, -5 dBsm and flying at an altitude of 7km, 2km respectively.
oUnambiguous range 90km, range resolution =150mt.
oOperating frequency is 3 GHz.
Latches (Static and Dynamic) using 180nm CMOS technology – LT SPICE.
Output and transfer characteristics of MOS (both PMOS and NMOS) transistor using 130nm CMOS technology – LT SPICE.
Full Adder (using transmission gates/tiny xor for sum function and compound gates for carry out) using 130nm CMOS technology – LT SPICE.
Academic work experience
Taught ‘Microelectronic Circuits’ for undergraduate students and prepared quiz questions Class Size: 30.
Worked as a Lab Assistant for the ‘Semiconductor Devices and Electronics’ course.
Done Lab Assistance for ‘Advanced Electronics’ Size: 7.
In-Class-Assistant for ‘Introduction to Electrical and Computer Engineering’ Size: 40.
Lab Assistant for the ‘Introduction to Electrical and Computer Engineering’ Size: 20.
Assisted Professor in preparing lecture notes for ‘Advanced Electronics’ class
Used to grade for ‘Advanced Electronics’ and ‘Intro to Electrical & Computer Engineering’ classes.
Taken zoom lectures for ‘Advanced Electronics’
Achievements and Participation
Given a Seminar report on Multi Core Processors at Vignan University.
Participated in conducting workshops on MATLAB during under graduation.
Participated as co-coordinator for college branch fest and also participated in Vignanostav, National level technical fest.
Won 2nd prize in College Level (during Pre-University course) Technical quiz competition.
Helped fund raising for the disabled in College.
Workshops Attended: Ethical hacking with Cyber security, Web logic and Jboss.
Areas of Research Interest: VLSI, Embedded systems, IOT, Renewable energy.
Skill Set: Good interpersonal skills, Detail conscious, Confident, Disciplined, Creative, Hardworking, Team worker.