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Assistant Professor / Project Designer & Trainer

Location:
Tiruchirappalli, Tamil Nadu, India
Posted:
December 16, 2020

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Resume:

RESUME

V. Jayasree

No.**, Viswas Nagar, *st Main Road, 1st Cross Street,

Trichy – 620008,

Tamilnadu, India.

E-Mail ID: adiqpq@r.postjobfree.com

Contact No. +91-995*******

CARRER OBJECTIVE

To put my abilities in to performance by working in a challenging position where I have opportunities to utilize my knowledge and share it to others as much as possible with genuineness, determination and social responsibility.

EDUCATION QUALIFICATION

2012-14

M.E – VLSI DESIGN

Kings college of Engineering

CGPA 8.19/10

2008-12

B.E – ECE

Periyar Maniammai University, Thanjavur

CGPA

9.31 /10

2008

Class – XII

Vairams Matriculation Higher Secondary School, Pudukkottai

86.2%

2006

Class – X

Vairams Matriculation Higher Secondary School, Pudukkottai

82.4%

WORK EXPERIENCE DETAILS

Greensoft Technologies

1.ASIC Design Engineer & Verification (Dec 2018 – Present)

JOB ROLE

To understand ASIC Architecture, development, design, RTL Coding.

To understand timing requirements, synthesis, flow and formal verification.

Take part in review of design specification, codes and verification plan.

To develop verification Environment and test benches to check the functionality of the completed product.

2.VLSI Design Engineer (Nov 2016 – Dec 2018)

JOB ROLE

To understand the Microarchitecture specification thoroughly and to prepare the Design Document to understand the features and working of the block in depth.

To write RTL code either in VHDL or Verilog as per the requirement for each different module.

To follow all the coding guidelines and make sure the design is synthesizable and to generate the netlist.

To perform STA analysis to check whether any timing issues are there within the design and to ensure all the timings are met within the design.

To add any additional features of the design changes and accordingly coded and modify the design.

Sri Bharathi Engineering College for Women, Pudukkottai

Assistant Professor / ECE (Jun 2014 - Nov 2014)

JOB ROLE

Classroom Teaching, providing guidance and supervision to graduate students.

Participating in departmental meetings, and voicing concerns or providing suggestions for improvement & providing academic support to professors and other faculty members.

Providing demonstrations and supervising experiments and investigations.

RECENT PROJECTS

1. A High-Performance Stochastic LDPC Decoder Architecture Designed via Correlation Analysis.

2. All-Digital Bandwidth Mismatch Calibration of TI-ADCs Based on Optimally Induced

Minimization.

3.SALE: Smartly Allocating Low-Cost Many-Bit ECC for Mitigating Read and Write Errors in STT RAM Caches.

4.A Mismatch Calibration Technique for SAR ADCs Based on Deterministic Self-Calibration and Stochastic Quantization.

TECHNICAL SKILLS

Languages : C, VHDL, Verilog

Platform : All Windows Platform

Packages : MATLAB

VLSI : Xilinx ISE 12.1

AREA OF INTEREST

ASIC Design

MEMS Technology

ACADEMIC ACHIEVEMENTS

Have been awarded for obtaining Academic Topper Rank II in M.E in March 2014 by Kings College of Engineering, Thanjavur.

Have been awarded for obtaining University Rank XII in B.E in April 2012 on the performance in all examinations held during 2008-2012 by Periyar Maniammai University, Thanjavur.

Received Internationally recognized Educational Credential Assessment (ECA) Report equivalence to Master’s degree from World Education Services (WES), Canada.

Received WES Digital Badge as Internationally Recognized Qualifications.

INPLANT TRAINING

BHARAT SANCHAR NIGAM LIMITED, Thanjavur. 22nd June – 27thJune’09.

PRASAR BHARATHI, Kumbakonam. 14th June – 18th June’10.

ARMADA INDUSTRIAL AUTOMATION, Thanjavur. 25th May – 15thJuly’11.

UG & PG PROJECTS

Embedded Based Automatic Passenger Alert and Location Identification System in Bus Using LCD.

A Modified Algorithm for Video Coding Using Hadamard Transform.

Design of Ultrasound Biomicroscopy in Open Platform Using FPGA.

Real Time Automatic Vehicle Plate Recognition Using FPGA.

PAPER PRESENTED

Presented paper in the “International Conference on Science, Engineering and Management “and won Best paper award with cash prize organized by Srinivasan Engineering college, Perambalur & SERB, DST, New Delhi on 28th & 29th March, 2014.

Presented paper in the “National Conference on Advances in VLSI, Communication & Signal processing “organized by JJ College of Engineering, Trichy on 14th March, 2014.

Presented paper in the “National Conference on Recent Innovations in Science and Engineering” organized by SURYA Engineering College, Erode on 11th March, 2014.

Presented paper in the “National Conference on Recent Trends in Communication & Networking “organized by ARJ College of Engineering, Mannargudi on 8th March, 2014.

Presented paper in the “National Conference on Advances in Next Generation Materials “organized by CARE Group of Institutions, Trichy on November 7 & 8, 2013.

Presented paper in the “Indian Conference on Research Ideas in Software Engineering and Security “organized by Thiagarajar College of Engineering, Madurai during August 19&20, 2013.

Presented a paper in National level Technical Symposium “INGINEA’10” at Kalasalingam University, Virudhunagar on 23rd October 2010.

Presented paper in “X ISTE State Level Students Convention –2010“at JAYAM COLLEGE OF ENGINEERING, Dharmapuri on 24th - 25th September, 2010.

Presented paper in the “National Conference on Recent Advancements in Engineering & Technology “organized by SSM College of Engineering, Komarapalayam during 9th April, 2010

Presented paper in “IX ISTE State Level Students Convention –2010“and Won SECOND PLACE at EXCEL COLLEGE OF ENGINEERING, Komarapalayam on 30th January, 2010.

Participated in Workshop on RADIO CIRCUITRY in “PROBE’10”, the National Level Technical Symposium at NIT Trichy on 12th and 13th, March 2010.

Participated in four days workshop on “NETWORK SIMULATION USING NS-2”, at Periyar Maniammai University, Thanjavur from February 1st to 4th, 2011.

PERSONAL PROFILE

Marital Status : Married

Date of Birth : 13.09.1991

Languages Known : Tamil, English, Hindi (Read & Write)

REFERENCES

1.Dr. M. Meignanamoorthy, Assistant Professor, Department of Mechanical Engineering,

K. Ramakrishnan College of Engineering (Autonomous), Samayapuram, Trichy – 621112.

Contact. No. +91-948******* E-Mail – adiqpq@r.postjobfree.com

2.M. Manoharan, Head Projects & Operation,

Greensoft Groups, Thillai Nagar, Trichy – 620018.

Contact. No. +91-770******* E-Mail – adiqpq@r.postjobfree.com

DECLARATION

I, V. Jayasree hereby declare that all the above furnished information and particulars are true to the best of my knowledge and belief.

Place: Trichy yours truly,

[V. Jayasree]



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