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Hardware Engineer

Location:
Chicago, IL
Posted:
December 09, 2020

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Resume:

Abhishek Ramesha

**** * ********* **, *** *F, Chicago, IL 60607

+1-312-***-**** adiiwr@r.postjobfree.com www.linkedin.com/in/abhishek-ramesha github.com/AbhishekRamesha Graduate student in Electrical and Computer Engineering, seeking an opportunity that will allow me to utilize my problem-solving skills and attention to detail to further develop my skills in Digital/Hardware Design & Verification, Embedded Systems, and MEMS.

EDUCATION

University of Illinois at Chicago, Chicago, IL Jan 2019 – Dec 2020 Master of Science in Electrical and Computer Engineering(GPA: 3.76) Courses: VLSI Design, High-Performance ICs, Neural Networks, Digital System Design, Micro-devices & Micromachining Technology(MEMS), Testing & Reliability, Nanoscale Semiconductor Devices, Robotics: Algorithms and Control

Visvesvaraya Technological University, India Aug 2014 - July 2018 Bachelor of Engineering in Electrical and Electronics Engineering EXPERIENCE

Teaching Assistant - University of Illinois at Chicago, Chicago, IL Aug 2019 - May 2020

● ECE 333 - Computer Communication Networks

Mentored students in Communications Lab and collaborated in Web Server and STMP projects.

Conducted additional review sessions to enhance their learning.

● ECE 310 - Discrete and Continuous Signals and Systems

Provided students with one-on-one tutoring and regular out of the class assistance.

Aided in the preparation of course content.

General Office Assistant - University of Illinois at Chicago, Chicago, IL May 2019 - Aug 2019

● Provided exceptional customer service by appropriately answering client concerns, forwarding messages, and confirming appointments, as necessary.

● Exhibited a high degree of discretion related to safeguarding Confidential Information. Summer Intern - Larsen & Toubro-Electrical and Automation, Mysuru, India June 2016 - July 2016

● Gained working knowledge of Switchgears and Power Meters.

● Performed QA for Energy Measurement Project.

TECHNICAL SKILLS

● Programming Languages: C, C++, Python, Verilog, System Verilog, Matlab

● Tools: Cadence Virtuoso & Layout Editor, Cadence RTL compiler, Xilinx ISE, ModelSim, HSPICE, L-Edit, Wireshark, AutoCAD, TensorFlow, PyTorch, Solid Edge, OrCAD, SharePoint, NanoHUB.

● Familiar with G-Suite and Microsoft Office applications including Word, Excel, Access. PROJECTS

Circuit Fault Simulator and Fault Coverage Using Various PRPGs (DFT, BIST, Python)

Developed a Fault Simulator using python which processes a circuit bench file and assigns fault node and value and provides fault detection values. It can also generate up to random 100 TVs using LFSRs for fault coverage analysis. Modeling of Graphene Nano Ribbon FET based 5T SRAM (Cadence, ASIC Design, Circuit Design)

Developed a compact model for GNRFET from existing CMOS technology. Modeled 5T SRAM from the GNRFET model which focused on reducing the Leakage Power. Thermally Actuating Tweezers using MEMS Technology (MEMS, Cleanroom, Bulk & Surface Micro-machining)

Designed and Fabricated a thermal actuating tweezer that intended to grab a single Red Blood Cell. Fabricated using Bulk Micro-machining Technology.

Radial Basis Function Network (Machine Learning, Neural Networks, Hardware Acceleration,)

Designed an RBF network without any Machine Learning libraries. Used Perceptron Training Algorithm to determine the weights and to separate clusters.

Shift and Add Multiplier (Verilog, Verification, Digital Circuit Design, Xilinx ISE)

Created a 32-bit Shift and Add Multiplier using Verilog on Xilinx ISE. Designed using two types of Accumulators, CLA and RCA. Conducted a comparative study to analyze their performance parameters. Motion Planning Algorithms (Robotics, Embedded Programming, OpenCV, Python, Embedded C)

Implemented Bug 1 and Bug 2 Algorithms using Raspberry-Pi based Robot. Also Implemented Dead Reckoning Algorithm to achieve Bug Algorithms.

64-Bit Carry Select Adder (Cadence, Hardware Design, CMOS)

Designed a high performance, Low power Carry Select Adder using Cadence. It had a very low delay of 0.5ns and worked at 2GHz.



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