Jianhua Ying

Email: adh7cb@r.postjobfree.com, Cell phone: 408-***-****

20201118

Objective: Sr. Electrical Design Engineer in the System, Circuit, Device and Material. Summary of Skills:

- Years in the design and manufacture of Analog/Mixed signal circuits and systems; Power supply unit; System control unit; System modeling; Mechatronics unit; Prototype creation.

- Understand the selection of material, components, device, structure, subsystem for electronic design; Well known of the characteristic in the Bipolar, CMOS devices and Component; Device model; Circuit simulation and synthesis.

- PCB design; FPGA design; DFT; DFM; DFC; Implement Multi-chip modules and bonding Flip-chip solder in micro BGA; Design of flip-chip process using copper pillars bump.

- Experience of Circuit stability with feedback loop optimization; RF Impedance matching; Switch softly with EMC; Nonlinear treatment with device characteristics in the circuit; Currents and voltage sharing technique; ESD protection; Heat flux out and thermal stability for equipment.

- Assist company to make technical development plan; Organize technical breakthroughs; Take ownership for critical design and perform issues; Technical innovation and invent patents.

- Versed in SPICE, HSPICE simulation software, Virtuoso verification tools, VHDL, Altium, OrCAD, Matlab, C.

Experience:

Feb 6 2017 ~ Mar 22 2019; Jabil AOC Pleasanton CA 94588 Electrical Engineer

Design of Laser array (VCSEL) system board in mixed signal. Design TEC controller system for high power Tunable laser use. Design micro socket adapter with tiny pogo pins (300um) for VCSEL module. Design of MicroMAX attachment process to VCSEL chip with flexible PCB; Design of flip-chip soldering process with the BGA(pitch0.8mm) of Cstar device to CFP2 PCB module; Device and system test and analysis in High Temp. High Humidity. Research of nanometer material sealing in the optical module; Maintenance of the equipments in the Clean room; Coach the people.

Sept 2 2015 ~ Apr 29 2016; Optoplex Corp. Fremont CA 94538 Test Engineer

Developing in balance amplifier and VSWR, Impedance Matching for LiDar; Developing in High Power EDFA Driver PCB Board. Research of deviation of wavelength of power peak in optical module. Troubleshooting and Failure analysis in the system. Write report and product traveler. Optical Channel Monitor test; Tunable Filter test; MEMS Optical Channel Monitor test; RMA with Optical modules.

Nov 8 2012 ~ Aug 17, 2015; NeuroSky Inc. San Jose, CA 95113 System Engineer

Design and built the circuit prototype of wearable product Wristband, Headset. Design of system function, check of circuit module, interface and devices. Material and components choice for Electrocardiography and Electroencephalography. Evaluation of lithium battery efficiency.

Create fixtures for human body signal and data mining. Design software to analysis the SNR of the signal data. Troubleshooting in circuit system and devices. Design of laser cutting process for products.

Jun 25,2012 ~ Sep 19, 2012; Calmar Laser Inc. Sunnyvale CA 94086 Consultant

Check the laser equipment; Check the procedure and traveler; Circuit troubleshooting; High power Laser screening test design; High power supply redesign; Create fixtures for test. Mar 27, 2011~ Aug 31, 2011; InPhenix Corp. Livermore CA 94550 Engineer.

Research on optical power drifting with temperature in Laser Diode and Super Luminescent LED; Photolithography and E-beam evaporation process with Titanium, Platinum, and Aurum; RTA

(rapid thermal annealing) analysis with interface in multi-layer thin film. 2001 to 2010 Integrated circuits design center of HUST Wuhan, China 430074 Sr. Principal Engineer.

Fast Charging Station System Designed for Electric Bicycles in fly-back topology, the output voltage range is DC24V-80V, the max power is 500W. PWM high power KW buck power supply with thermal shutdown and undervoltage lockout units. Design of High precise (+-0.5ppm/ T) real-time clock circuit product with lower consumption in digital trimming circuit.

Manufacture in Real-Time Clock circuit with low power consumption Supply voltage 1.6v -5.5v. Design of Micro power boosting DC-DC converter less than 1uA in shutdown mode, limited current 350mA, Vin 0.9V, Vout 34V, efficiency 85%. Design of PWM buck converter circuit with peak current loop in BCD05 process, regulation 0.1% during supply voltage 4.7~15V, out 3.3V/3A.

Design of a high-speed charge-pump phase-locked loops(PLL)for clock recovery circuits. Psupply:3.3V, Foutput:1.25GHz, Finput:625MHz, lock time: 200ns. Board design for Class D audio power amplifier with low THD(0.08%) and high PSRR(77dB/at 217Hz).

1990 to 2000 Semiconductor Processing Line of HUST Wuhan, China 430074 Engineer.

Algorithm design for the arc in Layout for power transistor; ASIC FOT9902 (FPGA) Fiber Optical Transceiver in system; Greenhouse Environment control system; Design of Automobile Generator Voltage Electronic Regulator; Product design of VDMOS power transistor; Micro- crystal silicon pressure sensor; Polymer capacity humidity sensor; MEMS optic mirror. Maintenance of semiconductor process equipments.

Education:

Sep. 1986 ~ Jun. 1989 (Master of Microelectronics Engineering.) Dept. of Electronics Science and Technology. Huazhong University of Science and Technology. http://www.hust.edu.cn

Sep. 1974 ~ Jun. 1977 (Bachelor of Microelectronics Engineering) Dept. of Electronic Engineering. Huazhong University of Science and Technology.