KARTIKA CHANDRA SAHOO, PH.D.

Hong Hsing Hai Area, Building 116, 14-4, DDA Dalian, China

Mobile: +86-151******** Email: adh3mg@r.postjobfree.com Performance-focused leader with Ph.D. in Materials Science & Engineering and specializing in complex research / development initiatives across a proactive global workplace eager to maximize success. P R O F I L E O F Q U A L I F I C A T I O N S

Scientist/Engineer with talents in Industrial Research & Development, Microelectronic Devices, and Failure Analysis and noted experience in the fields of Semiconductor, Reliability, Process Development and / or advanced package failure analysis.

Internationally experienced with a background in 3D NAND WLR development, microelectronic package failure analysis, reliability modeling and gate stack development for advanced logic technology nodes (e.g. 28nm, 20nm, 14nm, 10nm, 7nm, 3nm), as well as process technology development for 65nm logic node.

Multilingual communicator (English, Oriya, Hindi, Chinese) who encourages creativity, learning, and a synergistic workplace while promoting exposure to new ideas to stimulate personal / professional growth.

Ambitious self-starter with multiple 1st in Class credentials who offers collegiate teaching experience; additionally, has published 10+ research articles in prestigious journals and conferences; holds one patent. P R O F E S S I O N A L S Y N O P S I S

INTEL SEMICONDUCTORS (DMTM), DALIAN, CHINA (2018 – PRESENT) Staff Technologist – Reliability TD (NOV 2018 – PRESENT)

CMOS Reliability characterization, qualification and modeling for 3D NAND development.

Developed NBTI Lifetime prediction methodology with saturation model, which helped to mitigate the reliability issue raised due to HPA process introduced in new QLC CELL development in intel.

Working as a part of wafer Level Reliability (WLR) development team for QLC and TLC to qualify the first generation of 3D NAND build by intel independently.

Drove qual task force for TRIM development and Stress Screening development during 3D NAND development.

Site level recognition award for solving endurance issue for QLC and bringing ES1 few weeks earlier than target.

Department level (DTD) recognition for successfully worked in qual task force. TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (TSMC), HSINCHU, TAIWAN (2010 – 2018) Principal Engineer – Advanced Package Failure Analysis Department Q & R (APRIL 2016 – SEPT 2018)

Fault isolation and failure analysis of advanced packages (including FCBGA, PoP, advanced Fan-in and fan-out types).

Support the cases from product qualification fail in TSMC to end-user field return cases.

Suppot the development of TSMC InFO packages both during R & D and qualification stages.

Use C-SAM, TDR, EMMI, OBRICH, FIB/SEM (FEI & table top), 3D X-ray tools in day to day works.

FA and process development of super high density MIM (SHDMIM) structures for next generation.

FA support for process development of LK bulk material for N5 BEOL metal scheme. Principal Engineer – Technology Reliability Physics Department R & D (AUG 2011-APRIL 2016 )

Utilize broad industry knowledge toward performing reliability study and modeling (BTI, TDDB) of high-K gate stack with Al2O3 as IL layer as a replacement for SiO2 for advanced technologies with smaller EOTs.

Develop HCI methodology for circuits from DC stress data for 0.13/0.18 um BCD technology.

Demonstrate gate oxide breakdown study and understanding of TiO2 / Al2O3 on Ge transistors, which helped TSMC changing direction and saved a huge money while exploring Ge PMOS transistor for 5nm and beyond nodes.

Gate oxide breakdown understanding and modeling of horizontal nanowire transistors, and gate oxide breakdown study of SiGe transistors with and without Si Cap and Dit reduction treatment effects.

Developed TDDB Vmax roadmap and model for EOT scaling with SiO2, high-K, PEALD SiO2 and GeO2 based gate stacks.

Closely worked with the process development team for Ge transistor development with different dielectric materials (e.g. HfO2, SiO2, GeO2, Y2O3 etc.) and Dit improvement process treatments. Principal Engineer – Process Integration Development Department Fab Operation (MAY 2010-AUG 2011 )

Spearhead process development, new tape-out handling, and production ramp and yield improvement of 5 products in 65nm process.

Serve as the technology owner for 65nm CMOS process handling of more than 3 products with comprehensive responsibilities for customer handling and yield improvement.

Optimize operations success by directly interacting with customer and participating in conference calls.

Department level recognition for solving spot fixing issue to improve yield for customer. NATIONAL CHAIO-TUNG UNIVERSITY, HSINCHU, TAIWAN (2009 – 2010) Post-Doctoral Fellow – Department of EE

Strategically steered results-focused research on simulation of HEMT devices for high-frequency applications using ISE TCADs while meeting and / or exceeding Department of EE’s overall objectives.

Capitalized on the opportunity to assist Ph.D. candidates with research, along with demonstrating solid writing / editing proficiencies toward assisting PI in drafting new research proposals for the research group. NATIONAL INSTITUTE OF SCIENCE & TECHNOLOGY (NIST), BERHAMPUR, ODISHA (2002 – 2004) Project Assistant – UGC India Sponsored Project

Contributed sharp analytical abilities toward developing codes using FORTRAN for GaN-based HEMTs.

Prepared comprehensive study materials for NIST’s Professor A.K. Panda, and wrote conference papers. P.N. COLLEGE, KHURDA, ODISHA (2001 – 2002)

Lecturer –Department of EEM

Played a vital role in delivering targeted instruction to undergraduate students, and led all electronic labs. E D U C A T I O N & T E C H N I C A L S U M M A R Y Ph.D., Materials Science & Engineering (2009) NATIONAL CHAIO-TUNG UNIVERSITY M.Sc., Electronic Science (1st in Class, 2000) BERHAMPUR UNIVERSITY B.Sc., Physics (1st in Class with Distinction, 1998) BERHAMPUR UNIVERSITY PhD. Dissertation – “Design & Fabrication of Sub-Wavelength Antireflection Structure on Silicon Nitride for Solar Cells”

TCAD Packages – SILVACO TCAD ISE TCAD

Hardware – HP4070 WAT System Agilent B1500 ABM Lithography System Plasma Chemical Vapor Deposition (PECVD) System (STS 300PC Series 310PC) Four Probe DC Measurements System Metal Organic Chemical Vapor Deposition (MOCVD) System M E M B E R S H I P S

Program Committee Member – IEEE INEC (2011)

External Reviewer – IEEE Tran. On Devices and Materials Reliability (TDMR) External Reviewer -- Frontiers of Optoelectronics

External Reviewer- IEEE Microwave and Wireless Components Letters IEEE Member

External Reviewer – Current optics and Photonics, Korea External Reviewer – Indian Journal of Physics

P A T E N T S

“Sub-wavelength structure layer, method for fabricating the same and photoelectric conversion device applying the same”. Inventors: E. Y. Chang, K.C. Sahoo, M.K. Lin, Y.Y. Liao, and S. P. Wang. USP Application No: http://www.google.ch/patents/ US20110146779.

P U B L I C A T I O N S

Dielectric Breakdown of Al2O3/HfO2 Bi-layer Gate Dielectric, Kartika Chandra Sahoo, A. S. Oates, IEEE Transactions of Devices and Materials Reliability, VOL. 14, p. 327-332 March, 2014 (IF: 1.516)

Fabrication and Characterization of n-In0.4Ga0.6N/p-Si Solar Cell, Binh-Tinh Tran, Edward Yi-Chang, Hai- Dang Trinh, K.C. Sahoo, Kung-Liang Lin, Man-Chi Huang, Hung-Wei Wu, Tien-Tung Luong, Chen-Chen Chung, Chi-Lang Nguyen, Solar Energy Materials and Solar Cells, VOL. 102, p. 208-211 July, 2012 (IF: 4.593)

Growth of High Quality In0.4Ga0.6N Film on Si Substrate by MOCVD, Binh-Tinh Tran, Edward Yi-Chang, Kung-Liang Lin, Yuen-Yee Wong, Kartika Chandra Sahoo, Hsiao-Yu Lin, Man-Chi Huang, Hong-Quan Nguyen, Hai-Dang Trinh, Applied Physics Express, VOL. 4, p. 115501, 2011 (2011) (IF: 2.75)

Shape Effect of Silicon Nitride Sub-wavelength Structure on Reflectance for Silicon Solar Cells, K.C. Sahoo, Yiming Li, and Edward Yi Chang, IEEE Trans. Electron Devices. VOL. 57, NO. 10, October, 2010 (IF: 2.267)

Novel Metamorphic HEMTs with Highly Doped InGaAs Source/Drain Regions for High Frequency Applications, Kartika Chandra Sahoo, Chien-I Kuo, Yiming Li, and Edward Yi Chang, IEEE Trans. Electron Devices. VOL. 57, NO. 10, October, 2010 (IF: 2.267)

RF Performance Improvement of Metamorphic High-Electron Mobility Transistor Using

(InxGa1−xAs)m/(InAs)n Superlattice-Channel Structure for Millimeter-Wave Applications, Chien-I Kuo, Heng-Tung Hsu, Yu-Lin Chen, Chien-Ying Wu, Edward Yi Chang, Yasuyuki Miyamoto, Wen-Chung Tsern, and Kartika Chandra Sahoo, IEEE Electron Device Letter, VOL. 31, NO. 7, July, 2010 (IF: 2.719)

Finite Element Analysis of Antireflective Silicon Nitride Sub-Wavelength Structures for Solar Cell Application, H.M. Lee, Kartika Chandra Sahoo, Yiming Li, J. C. Wu, and Edward Yi Chang, Thin Solid Films, Vol. 518, pp. 7204–7208 (2010). (IF: 1.909)

Fabrication and Configuration Development of Sub-Wavelength Structure on Silicon Nitride for Solar Cell Application, Kartika Chandra Sahoo, Men-Ku Lin, Edward Yi Chang, Yiming Li, and Jin-Hua Huang, Journal of Nanoscience and Nanotechnology, Vol. 10, No.9, September, 2010. (IF: 1.352)

Numerical Calculation of the Reflectance of Sub-wavelength Structures on Silicon Nitride for Solar Cell Application, Kartika Chandra Sahoo, Yiming Li, and Edward Yi Chang, Computer Physics Communication, 180, 1721–1729, 2009. (IF: 2.3)

Silicon Nitride Nanopillars and Nanocones formed by Nickel Nano-clusters and Inductively Coupled Plasma Etching for Solar Cell Application, Kartika Chandra Sahoo, Men-Ku Lin, Edward Yi Chang, Tran Binh Tinh, Yiming Li, and Jin-Hua Huang, Japanese Journal of Applied Physics, 48, 126508, 2009. (IF: 1.018)

Fabrication of antireflective sub-wavelength structures on silicon nitride using nano cluster mask for solar cell application, Kartika Chandra Sahoo, Men-Ku Lin, Edward Yi Chang, Yi-Yao Lu, Chun-Chi Chen, Jin- Hua Huang, and Chun-Wei Chang, Nanoscale Research Letter, 4, 680-683, 2009 (IF: 2.557)

Novel Cu/Cr/Ge/Pd Ohmic Contacts on Highly-Doped n-GaAs, Kartika Chandra Sahoo, Chun-Wei Chang, Tung-Ling Hsieh and Edward Yi Chang, Journal of Electronics Materials, Vol. 37, No. 6, June, 2008. (IF: 1.421)

InAs/InGaAs Metamprphic High Electron Mobility Tansistor with Cu/Pt/Ti Gate and Cu airbridge, Chun-Wei Chang, Po-Chou Chen, Huang-Ming Lee, Szu-Hung Chen, Kartika Chandra Sahoo, Edward Yi Chang, Muh- Wang Liang, Tsung-Eong Hsieh, Japanese Journal of Applied Physics, Vol. 46, No. 5A, May, 2007. (IF: 1.018) C O N F E R E N C E S C O N T R I B U T I O N S

Positive Bias Instability in Gate-First and Gate-Last InGaAs Channel n-MOSFETs, IRPS 2014, S. Deora, G. Bersuker, T. Kim, D.-H. Kim, C. Hobbs, P.D. Kirsch, K.C. Sahoo, and A.S. Oates.

Effect of Different AlN/Si(111) Templates on the Performance of InAlN/GaN-Based Ultraviolet Photodiode, IEDMS 2013, Binh Tinh Tran, Chen Chen Chung, Kartika Chandra Sahoo, Chi Lang Nguyen, Quang Ho Luc, Huy Binh Do and Edward Yi Chang.

Influence of growth temperature of AlN buffer layers on the crystalline quality of GaN film grown on Si (111) by metal organic chemical vapor deposition, in 5th International Workshop on Advanced Materials Science and Nanotechnology, Hanoi, Vietnam, 2010, B. T. Tran, E. Y. Chang, K. L. Lin, K. C. Sahoo, H. Y. Lin, N. M. Thuy, H. Q. Nguyen and H. D. Trinh.

3D Finite Element Simulation of Morphological Effect on Reflectance of Si3N4 Sub-Wavelength Structures for Silicon Solar Cells, published in Proceedings INEC 2010, Yiming Li*, Ming-Yi Lee, Hui-Wen Cheng, and Zheng-Liang Lu, Kartika Chandra Sahoo, Edward Yi Chang.

Finite Element Analysis of Antireflective Silicon Nitride Sub-Wavelength Structures for Solar Cell Application, Published in International Thin Films Conference, TACT 2009, December 14-16, 2009, Taipei, Taiwan, H. M. Lee, Kartika Chandra Sahoo, Edward Yi Chang, J. C. Wu, and Yiming Li.

Design and Fabrication of sub-wavelength structure on Silicon Nitride for Solar Cell Application, Accepted to publish in Proceedings of 9th International Conference on Nanotechnology, IEEE Nano 2009, Geneoa — Italy, Kartika Chandra Sahoo, Yiming Li, Men-Ku Lin, Edward Yi Chang, and Jin-Hua Huang

Reflectance of Sub-Wavelength Structure on Silicon Nitride for Solar Cell Application, Accepted to publish in Proceedings of International conference on the SISPAD-2009, San Diego — California, Kartika Chandra Sahoo, Men-Ku Lin, Edward Yi Chang, Yiming Li, and Jin-Hua Huang

Study of Reflectance Properties of Sub-wavelength Structures on Silicon nitride for Solar cell application, Accepted to publish in Proceedings of 34th PVSC -2009, Philadelphia, PA, USA, Kartika Chandra Sahoo, Men-Ku Lin, Edward Yi Chang, and Jin-Hua Huang.

Velocity Overshoot 2D-effect in GaN based submicron Devices, Presented in CODIS-2004, JU, Kolkata, K.C. Sahoo, A.K. Panda.

SiC-based IMPATTs at Microwave and MM-wave frequency, Presented in INCURSI-2004, K.C. Sahoo, Suchismita Nayak, and A.K. Panda.

Wide band gap 6H-SiC IMPATTs to use at high frequency, Presented in APMC-2004, New Delhi, Dec 15- 18, 2004, K.C. Sahoo and A.K. Panda.

Velcoity Overshoot 2D effect in submicron devices, Physics of Semiconductor Devices IWPSD –2003, Narosa Publishing House, pp. 797-799, K.C. Sahoo, and A. K. Panda.

Dynamic characteristics of SiC-based IMPATTs, Physics of Semiconductor Devices IWPSD –2003, Narosa Publishing House, pp. 794-796, K.C. Sahoo, D. Khadanga, and A. K. Panda.

Potentiality of SiC to use as IMPATTs, National Symposium on Advances in Microwaves and Light Waves

(Allied Publishers), pp. 112-115, 2003, Suchismita Nayak, K.C. Sahoo, and A. K. Panda.

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