YOGESH C V
Mob. No.: +91-974*******
Email id: adgzro@r.postjobfree.com
CAREER OBJECTIVES
To work in an organization where harmony between professional and personnel goal is key to shared success and continuous opportunities are available towards the development.
Summary of Credentials:
Experience in Qualitative analysis for ICs
Hands on experience in using Spice dec for checking circuit design and characteristics.
Hands on experience on creating test vectors for an IC based on Datasheet .
Sound knowledge of QA flow for circuits.
Extensive knowledge of corner condition, pull up circuit and pull down, At freq, drive strength and leakage current for circuits .
Hands on experience Perl and Shell scripting.
Comprehensive knowledge of the methodologies and applications of advanced functional verifications and tools.
Hands on experience of EDA tools like Sim vision, Synopsys, Cadence.
In-depth knowledge of the concepts of all functionality check, analysis and techniques of QA flow on ICs.
Preparing separate flow and test vectors for both transmitter and receiver to analyse all functionality check on ICs separately.
Verifying and validating the desired output of the circuits with respect to Datasheet and reporting if not matching.
Possess strong verification skills and debugging.
Possess outstanding communication and problem-solving skills.
Good knowledge of low power techniques in VLSI Design.
Good understanding about Layout design.
Good understanding of Antenna Effect, Latch Up, ESD, EM issues and techniques to reduce them.
Good in reducing systematic errors using matching techniques like common centroid and interdigitization.
Work History:
1.QA Analysis Engineer, Sevitech & Jupitor Technology Pvt Ltd.
Client: Sandisk India Pvt Ltd .
Duration: Oct 2015: Sept 2016
Responsible for carrying out QA flow for ICs.
Worked on number of IC like TM800, GPIO, DQS and many others .
Handled the task of running functionality checks on ICs.
2.Intern in CRL Team,
“Design and implementation of OFDM based WiFi PHY Layer”
Bharat Electronics Ltd., Bangalore, India
Duration: 10 months
Assigned responsibilities of assisting in writing verilog codes for modules in creating, running, debugging and tracking tests against test plans
Performed the tasks of implementing of checking the BER and Transmitted bits.
Handled responsibilities of preparing and implementing models desired in the std as per as version in tool
Played active role in stimulation, verification coding, and review of modules in simulink.
Mapping Standard into codes and Correcting the constellation points
Educational Qualifications:
MSc. Tech in VLSI Design and Verification
SOIS, MANIPAL UNIVERSITY, Manipal
CGPA: 7.77 on a scale of 10
Bachelor of Engineering in Telecommunication
SAI VIDHYA INSTITUTE OF TECHNOLOGY, Bangalore
Affiliated to VISVESVARAYA TECHNOLOGICAL UNIVERSITY, Belgaum
CGPA: 5.5 on a scale of 10.
Activities
Have participated and won prize in various inter and intra Quiz competitions held in school and college.
Have participated and won prizes in interclass cricket and football tournament held both in school and college.
Have actively participated in cultural and sports activities in school and college.
NCC A certificate and have attended many camps and other physical activity
Personal Details
oDate of Birth: 22nd October 1990
oLanguages Known: Kannada English and Hindi.
oMobile No.: +91-974*******
oEmail ID: adgzro@r.postjobfree.com
oAddress: #16/9, 5thcross Shakthiganapathinagar Basveshwaranagar, Bangalore-79
References
Will be pleased to furnish upon request