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Machine learning, python, VHDL, Verilog, C++

Location:
New Delhi, Delhi, India
Salary:
20,000
Posted:
October 15, 2020

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Resume:

CURRICULUM VITAE

Name: Sonam

Study: B.Sc. (H) Electronic Science

College: Deen Dayal Upadhyaya College, University of Delhi

Phone No.: 837-***-****

E-mail: adgzjc@r.postjobfree.com

Address: D-56, Masjid Wali Gali, phase-1, Near Fauji Farm House,

Jai Vihar, Najafgarh, New Delhi- 110043

Career Objective: To work in the field of Robotics, Machine Learning and VLSI design.

Academic Qualification:

Qualification

Year of Passing

Institute

Board/University

Percentage

B.Sc. (H)

Electronics

Science

Pursuing

Deen Dayal

Upadhyaya College

University of Delhi

80.2

Senior

Secondary

2017

Sarvodaya Kanya

Vidyalaya School

C.B.S.E. Board

82

Matriculation

2015

Sarvodaya Kanya

Vidyalaya School

C.B.S.E. Board

77

Father’s Name

Mr. Veer Singh

Mother’s Name

Mrs. Saroj Devi

Date of Birth

04th-Oct-1999

Nationality

Indian

Languages known

English, Hindi

Personal Details:

Extra Co-curricular Activities:

Participated in a national event competition named IOT challenge 2019 by i3indiya at IIT Bombay held on 17 March 2019.

Student Co-ordinator of ROBOTICS CLUB in DDUC.

Student Co-ordinator in organising of DDUC hackathon 2020.

Participated in an one week FDP on FPGA and ASIC Design held at BVCOE.

Student Co-ordinator in organising of 15 days Hands on Internship on ATmega Microcontroller using ARDUINO IDE held at DDUC.

Achievements:

Best Scientific Model Demonstration in TURYOJAS 2019 organised at Jaypee University Of Information and Technology, Waknaghat

2nd prize in ROBO RACE held at Institute Of Informatics and Communication, University of Delhi, South Campus.

Technical Skills: Programming Languages:

Programming Languages: C++, VHDL, Python, Verilog

Microcontrollers: ATmega Series (8,16,32,328p), FPGA

Area of Interest:

Software Coding

Robotics (Embedded System)

VLSI Designing

IOT

Machine Learning

Training:

1.Title: Embedded System(AVR)

Duration: 15-days

Institute: Deen Dayal Updahyaya College, University of Delhi

2.Title: FPGA and ASIC Design

Duration: 7-days

Institute: Bharati Vidyapeeth’s College Of Engineering (Affiliated to GGSIPU Delhi)

3.Title: FPGA (Design and Verification)

Duration: 1 month

Company: CoreEL Technologies. Sandeepani(School of Embedded System Design),

Banglore, India

Projects:

Heart beat sensing using Arduino

VGA interfacing using FPGA

Bluetooth controlled Drone

IR control car

Gesture controlled robot

Declaration:

I hereby declare that the above information is correct to the best of my knowledge and belief.

Date : 07-03-2020

(SONAM)



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