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Assistant Design

Location:
Fort Collins, CO
Posted:
September 28, 2020

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Resume:

EDUCATION

TECHNICAL SKILLS

PROFESSIONAL EXPERIENCE

MASTER’S PROJECT

RELEVANT PROJECTS

Lekha Arun Rane

970-***-****, adghc4@r.postjobfree.com,

linkedin.com/in/lekharane engineering/project/team

• Master of Science in Electrical andComputer Engineering May’2021 Colorado State University, Fort Collins, Colorado

Relevant Coursework: Digital System and Logic Design, VLSI System Design, FPGA Signal Processing, HW/SW Design of Embedded Systems, Computer Architecture, Fault Tolerant Computing, Machine Learning, Silicon Photonics

• Bachelor of Engineering in Electronics & Telecommunication Engineering May’2018 Thadomal Shahani Engineering College, Mumbai University, India Relevant Coursework: Analog and Digital Electronics, VLSI design, Microcontrollers and Microprocessors, Signal Processing, Analog and Digital Communication, Control Systems, Computer Networks

• Electrical System Design

Simulation Tools : Cadence Virtuoso, SPICE, TINA, Simulink, Lumerical PCB Design Tools : EAGLE, KiCAD

Layout Design Tools : Cadence Virtuoso

Mechanical Design Tools: FreeCAD, AutoCAD

• Embedded System Tools: Raspberry Pi, Arduino, System C

• FPGA Programming Tools: ModelSim Altera, Quartus II

• HDL Languages: Verilog, VHDL

• Programming Languages: C, C++, Python, MATLAB, GNU Octave

• IDE / OS: Eclipse, Linux, Windows

Graduate Teaching Assistant Jan’2020 - Present

• Graduate Teaching Assistant for ECE 450 /451, ECE 571/575 Digital System Design & Experiments in Digital System Design and VLSI System Design & Experiments in VLSI Design. Duties comprised conduction laboratory sessions using Cadence Virtuoso, Quartus II and ModelSim Altera, doubt solving sessions and evaluating examinations, experimental reports and assignments of a class of 50 students. Database Management Assistant June’2019 – Dec’2019

• Search Engine database record optimization, verification & correction using PRIMO in front-end and ALMA inback- end for CSU Morgan Library. Technical Lead Developer for metadata automation. Robocup Support Engineer Feb’2019 - June’2019

• Electrical system designer and PCB design support for the CSU Robocup. Duties comprised, designing hardware and firmware for autonomous soccer playing robots for the international Robocup competition. Automated Testing of Silicon Photonic Integrated Circuits August’2019 - Present

• Project lead for setting up the premier automated silicon photonic test station at Colorado State University.

• Studied and compared various photonic vendors by creating the BOM for each vendor along with their advantages.

• Researched various state of the art testing devices for fault detection and performance evaluation in photonic circuits.

• Designed photonic circuits using CLIPP’s in Lumerical MODE and Interconnect to overcome thermal fluctuations by controlling the microring resonator and thermal heater using wavelength locking mechanism.

• Optimized the microring resonator’s spectral response for better accuracy, power and performance. CSU Robocup (KiCAD, Raspberry Pi, Arduino, TINA, FreeCAD)

• Designed robot electrical systems that includes the motors, motor-controllers, micro-controllers & solenoids.

• Gained hands on experience in system architecture design.

• Simulated various circuits for overall optimization and verification using software such as PSPICE and TINA.

• Designed custom footprints, symbols & libraries for Arduino, Raspberry Pi, solenoid drivers, BLDC motor controllers, Communication Modules using KiCAD.

• Addressed timing requirements for RF communication module by designing high-speed PCB interconnects.

• Developed C++ low level driver wrappers for inter device communication on a heterogenous system.

• Developed and programmed communication interconnections using protocols such as SPI and I2C for communication between Raspberry Pi, Arduino and other peripherals for Real time control. SAT solver implementation (Python, PyEDA, Digital Logic Synthesis)

• Designed a SAT (satisfiability) solver for any given input function.

• Converted the given SOP equation into its corresponding CNF form by first converting into the Dimacs form using PyEDA.

• Provided arrangements for user input assignments to any variables for partial assignment of inputs.

• Checked for equivalency for any two input equations and checked for verified all outputs using PyEDA. Thermal Analysis in Silicon Photonics Integrated Circuits (Silicon Photonics, Lumerical)

• Designed analytical model of silicon microring resonator using Lumerical MODE to observe effects of self-heating.

• Using material model, simulated a temperature induced red and blue shift in resonance wavelength with a total shift of 0.00728nm observed at the through and drop ports of the microring.

• Implemented various models of two and three adjacent microrings at different temperatures and distances to observe effects of thermal crosstalk of the rings on each other.

• Studied the through and drop port spectrums of the rings at various temperatures and observed change in spectrum introduced due to thermal crosstalk and optimized design for least crosstalk generation. Universal 8-bit shift register (Cadence Virtuoso, Assura)

• Designed an 8-bit universal shift register with 4 modes of operation: serial-in serial- out, parallel-in serial out, serial- in parallel-out and parallel-in parallel-out.

• Utilized knowledge of FSM to implement the schematic using serial type daisy-chain arrangement with D flip flops, transmission gates and mux.

• Created the design layout in Encounter using 0.9V TSMC N-well CMOS process and tested using Assura Tools like DRC, LVS and QRC.

• Optimized the layout for minimum area, power to meet specific area and power requirements. All-digital phase locked loop (FPGA, VHDL, Quartus II, Altera ModelSim)

• Developed an all-digital PLL using custom designed digital phase detector, k-counter loop filter, digital controlled oscillator and divide by N counter.

• Designed a phase detector using D flip flops & AND gate to obtain the phase difference between two digital signals, K-counter loop filter which works as an integrator to count the phase difference in terms of number of clock cycles along with DCO for addition and removal of pulses based on carry borrow signals.

• Programmed the logic in VHDL using Quartus II software and observed the results in Altera ModelSim. Automatic License Plate Recognition (Machine Learning, Python)

• Implemented YOLO using darkflow and performed validation using a pre-trained model and created custom dataset for training the model

• Implemented the ALPR model on darknet and trained the model using the dataset we created to obtain weights.

• Using these weights, validated model trained on darknet and compared the results from darknet and darkflow.

• Compared the accuracy, mean average precision, loss vs number of iterations for various training parameters. Traffic Light Controller (Verilog, Cadence Virtuoso, FSM)

• Designed a traffic light controller using a complex finite state machine to implement the logic design.

• Used implication chart method for state reduction and state encoding and developed the excitation table.

• Implemented the finite state machine by using Cadence Virtuoso and programmed a Verilog model for the same. LEADERSHIP AND INVOLVEMENT

Teacher for Technology Leadership Program (TLP) Conducted byNGO Ekagrata July’2017 – March’2018

• Provided tutoring for a class of 50 of grade 4 students on basic electronic concepts and circuit assembly.

• Tutored for topics such as electrical design flow, electrical components, breadboard testing etc.

• Created class quizzes resulting in more interactivity and teamwork among students and teachers.



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