Principle System Enginner

Bhushan Verma

San Jose CA

Mobile: +1-669-***-****

Mail Id: *****.*******@*****.***

Working on L1B. having valid H1B

Summary:

Currently working with Cisco USA CA for ASR9K 3RU pizza box edge router development. Work include PD infra development. Having 15+ years of work experience from Low level Embedded System Software to Middle ware to Applications development.

Experience in Platform development, Datacom SW development [Control plane and data plane], Board Bring-up, Boot-loader/BSP, Embedded SW/Firmware, Different Hardware devices and ASICs/PHY bring-up, Interface bring-up, FPGA drivers, ASICS drivers development, Muti-Core SMP based system, Porting from one platform and HW to other platforms and HW, Middleware, HAL and Application software’s.

Worked on C/C++/Assembly, Linux, Cisco NGXR [Linux Kernel] and IOS-XR [Qnx Kernel], Solaris/Open-Solaris, RTOS [T-kernel, ThreadX], Windows.

Worked in startup product-based companies as well as big MNC’s and having exposure to lead and mentor a team of size from 4 to 15 team members.

I have worked and lead in following activities at least:

oBoard Bring Up:

Define Memory map for the system.

Boot loader/Rommon modifications and porting.

BSP/Startup code modifications and porting.

IOS-XR bringUp.

OC-48 OTN line card bring up.

oSecure Boot design and architecture. Integrating secure lib into rommon boot-loader to verify the XR-image.

oWorking experience on different drivers like FPGA drivers, RTC, PCIe Server, I2C server, DPAA driver, UART/SPI/MDIO/eUSB drivers porting and modifications.

oBITS timing, Zarlink device drivers and in rommon and XR.

oChassis management, shelf mgmt., Envmon, Reload, FPD, watchdog.

oMarvell Poncat Ethernet drivers using SDK, Data Plane ASIC drivers.

oKernel Dumper, media deriver’s modifications.

oThird-party SDK porting and integrations.

Education:

M.S. (Master in Science) in Software System from BITS Pilani with CGPA 6.79 in 2010-2011.

B.Tech (Information Technology) from U.P. Technical University with 71% in 2004.

Client Exposure:

Worked with different clients like Japanese, Chinese, European, USA, Indian and Israel based.

Worked in Japan for more than 2 years with product-based companies like NEC, EUPHONIC INC.

Worked in China for more than 3 months with Nokia Siemens Networks. Worked in Italy for more than 3 months with Cisco.

Experience:

Nov 2010 – Till date with Aricent technologies:

Working as Architect with Altran for Cisco-ODC. Here I am mainly worked for Low level software development (Bootcode, Firmware, BSPs and Device Drivers for PPC board), Line card/Shelf controller card bring-up, OTN devices and its interface bring-up, FPGA/ASICS Drivers, Chassis mgmt, Clocking/Timing, HA/ISSU.

Jan 2010 - Nov 2010 with IBM Pvt Limited India:

Worked as a Senior System Developer (Module Lead) on C/Solaris/Middleware/CRM product development for Vodafone Spain.

May 2009 – Jan 2010 with Compass System Pvt Limited:

Compass system is a USA based product company. Worked as a Senior Software Engineer in Compass System Pvt Limited on Linux system product development.

Jan 2005 – May 2009 with I.A.P. Company Ltd:

Worked as a System Engineer/Lead Engineer on Embedded and System Software’s development and porting for Japanese product-based client. IAP Company Limited is an Indo-Japanese collaboration company, which deals in Software services with Japanese based client.

Technical Skills:

Domain: Platform Development, Embedded, Datacom, Porting.

Operating System: Linux, Solaris/Open-Solaris, RTOS [ITRON T-kernel, ThreadX], Cisco NGXR [Linux kernel], IOS-XR [QNX kernel], Windows

Networking Protocols: TCP/IP, Socket Programming, IPC/RPC, HTTP

Languages known: C, Assembly, Shell script/Perl script.

Processors: PowerPc [P4040/P2041], Altera NIOS II Processor/DSP, ARM9/ARMv6, i386(x86), MultiCore/SoC SMP architecture.

Hardware/Interfaces: Marvell Poncat Switch, PMC ASICs, Xiling FPGA’s, HPAV CG2211 chip, Broadcom PetraB/Amba packet processor chip/Dune SDK Switch, Altera Graphic/Display Controller Chip.

Interfaces: SPI/I2C/MDIO,PCIe,UART/Serial Interface, eUSB.

Compiler Tool Chain: GNU Tool chain, ARM Cross-Compiler Tool chain, Sun Compiler Tool chain, ELF debugging/manipulation tools/Binutils PowerPC tool chain, ARM ABI, i386 ABI, ABI and ELF Binary format.

Methodology: UML, Design Patterns

Database: MySql, PgSql, Sybase.

Development Tools: Vi/Vim editor, Makefile, Valgrind, gprof, gcov, GDB/DBX JTAG/BDI interface/Remote debugging, Lauterback/Trace32, Altera NIOS IDE, Visual Studio IDE, Bugzilla, Apache Tomcat, Web server, Beyond Compare 3, SourceInsight

Code control tools: PVCS/CVS/WinCVS/SVN/ACME version control tools

Key Projects:

Currently working on ASR9K 3RU pizza box edge router project:

Description

3RU pizza box providing the following capabilities:

• 1.6T to 3.6T capacity in a 3 RU form factor.

• Ethernet port speeds from 10GE up to 400GE.

• Feature rich PHY which supports PTP and MACSEC.

• Optimized cost per port.

Development Environment

C, Linux, Board Bringup, user-space driver, platform/infra development,

Roles & Responsibilities

Involved SFS, Design/System flows, Coding, and Review.

Board bring up, User space driver development, HAL/middleware components like Canbus driver and Low-level CBC FW

Chassis mgmt. [shelf mgmt., envmon, fan mgmt., fpga/FW upgrade], Led Mgmt., Control plan Ethernet switch configurations and bring up.

Client

Cisco

Scapa-OTN:

Description

Scapa is a new platform from Cisco CORBU. It is part of high-end Panini family. Applications includes:

•OTN switch

•MPLS-TP switch

•L3 Router

•Transponder shelf

•High speed DWDM optical shelf (100G and above)

•L3/MPLS-TP – OTN – DWDM combo

In this project there are two RP [Route Processor card] cards and 16 multiple line cards. RP card is a Multi-core architecture which contains 8 cores Intel Sandy Bridge and is used as the controller card.

RP card is having host OS as Linux and running three Virtual machines over it. All line cards are CPU less therefore all drivers run in centralized manner on RP virtual machines to manage all 16 line cards.

Development Environment

C, NGXR (Embedded Linux [Wind River Linux2.6]), Firmware/Driver, Multicore/SoC/ASICs/FPGA, Embedded Networking Architecture.

Roles & Responsibilities

Involved proposal writing and estimations, requirement gathering, SFS, Design/System flows, Coding, and Review.

Board brings up, Diagnostic support, Firmware/Boot loader, Driver development using libudrv library in virtual machine.

Low level FPGA/ASIC drivers, clock drivers, PCIe/I2C/SPI/MDIO, HAL/middleware components.

Porting/enhancement third-party ASICs SDK as per hardware architecture/design and platform [linux/vxworks].

Worked for different line cards and its devices like ‘ASICS, PHYs, FPGAs, clocks, PCIe Switch, L2 Switch’ bring up.

ASICs data plane drivers and interface bringup.

Client

Cisco

Gimli:

Description

Gimli platform is a converged packet-optical XR based system in pizza box form factor that is targeted to be deployed as pre-aggregation device supporting aggregation of packet and TDM clients with a common OTN uplink to optical transport aggregation and switching platforms such as Scapa.

From a product definition perspective Gimli platform shall support following variants:

Gimli A for low cost pre-aggregation of L1 and L2 services

Gimli B for low cost pre-aggregation of L1 and L2 plus PDH services

Gimli supports 2xCPU distribution model: one act as Route processor CPU and other acts as Line card CPU. Both CPU are Freescale P2041 ie quad-core processors. IOS-XR [QNX Kernel] is running on Both CPUs. System running IOS-XR/QNX SMP mode enabling all 4 P2041 cores. Both CPU communicate over Marvell Poncat2 Ethernet switch.

RP-CPU functions as node-controller and hosts all management/control plane software. LC-CPU hosts controllers owning physical interfaces along with all drivers required for device configuration, control and monitoring functions optical framer ASICs and NPU.

Development Environment

C, Assembly, IOS-XR [Qnx], Drivers [FPGA, SoC, Chips], Lauterbach/GDB, SDKs, Firnware/BootLoader/BSP, Multicore/SoC, Embedded Networking Architecture.

Roles & Responsibilities

Leading platform/infra development. Involved proposal writing and estimations, requirement gathering, System functional spec, Architecture Design, Design/System flows, Coding, and Review.

Responsible for platform/infra and Line card development that involves at least as following:

a.Define Hardware and Software architecture, Writing SFS, Architecture and Design.

b.Board brings up, boot loader, BSP and QNX bringup, Memory map, Diagnostic SW.

c.Design and develop CAN BUS functionality replacement with new FPGAs.

d.Working on different devices bringup like ‘ASICS, FPGAs, Timing clocks, Watchdog, Poncat L2 Switch’ brings up.

e.Porting and enhancement third-party ASICs SDK as per hardware architecture/design and platform [Linux/Qnx].

f.Low level FPGA/ASIC drivers, Timing clock drivers, PCIe/I2C/SPI/MDIO/eUSB drivers porting and modifications, HAL, Data Plane drivers, middleware components, chassis management/shelf mgmt../Envmon/Timing, DPAA/Ethernet Driver enhancement.

g.HA implementation and Fast path OTN GCC packet handling and processing at FPGA <-> switch <-> CPU.

Client

Cisco

HPAV-ZWave:

Description

This Project is a development, porting, integration and enhancement of firmware and boot loader for Home Networking device TAVOR2 Platform [CG2210 chip with ARC processor and running threadX] and Z-Wave device. TAVOR2 chips communicate with each other over power line medium. One of the TAVOR2 device acts as Coordinator central controller [CCo] and others acts as Stations.

TAVOR2 device also known as HomePlug AV (HPAV) device. On this device firmware SW is running along with ThreadX RTOS. Z-Wave chip contains wireless firmware software. TAVOR2 and Z-Wave chip communicate with each other using serial interface. It makes sense to combine both powerline networking, such as HPAV with a wireless technology, such as Z-Wave to provide convenient full home coverage as well as flexible and low-cost home control. That’s why we are doing this.

Development Environment

C, ThreadX RTOS, Firmware/BSP/Driver, BootLoader, Multicore/SoC Architecture, SVN subversion, GDB/Remote debugging/JTAG interface, Cross compilation, IPCs/RPC/Networking, Multithreading.

Roles & Responsibilities

Enhancement and feature development for HPAV Firmware, Boot loader, UART/SPI driver porting/modification.

Firmware upgrades feature implementation.

Porting Zip router code [Linux based] to TAVOR2 Platform [ThreadX based].

Study client requirement doc and based on this prepare design approach document.

Design and implementation of firmware software.

Client

CopperGate Israel.

OTN MPLS:

Description

This Project is an Embedded Datacom development project for Broadcom PetraB packet processor chip [Switch Hardware: FPGA device Petra-B and PowerPC architecture].

In this project there are two SC [System controller card] cards and some of LC [Line card] cards. SC card is a Multi-core architecture ODU SC card, which contains CPU P4040 and is used as the controller which has four CPU cores.

To meet the system performance requirements, SC SW runs over Linux in SMP mode on these cores in P4040 CPU. SW running on SC and LC cards is multithreaded applications that communicate to each other using RPCs to configure data/traffic on Hardware Petra-B.

LC cards i.e. 10x10 Gbps and 100Gbps cards acts as a packet processor and traffic manager and having MPC8544E PowerQUICC III processor.

Development Environment

C, Embedded Linux, Uboot, Broadcom PetraB packet processor chip and Dune SDK Switch/PetraB/FPGA//PCI-E/DMA, Multicore/SoC/SMP Architecture, Driver/Dune SDK, middleware/abstraction layer, SNMP/RMON,TCP/UDP/IP/MPLS, MIB, SVN subversion, GDB/ Remote debugging, BDI/JTAG interface, Cross compilation/Makefile/shell scripting, Socket, IPCs/RPC/Networking, Multithreading.

Roles & Responsibilities

Lead engineer in platform team. I worked to develop Multithreaded Control plane SW for SC [System controller] card and Multithreaded Data plane SW for LC [Line card] card for 10GE Optical data and then enhance and develop the same code for different Line card for 100G optical data.

Design and implementation of control plane and data plane multithreaded software’s, abstraction layers, and middleware components in embedded systems.

Architecture and development of management interfaces like SNMP, CLI and Web for embedded networking device.

Uboot and developing user space driver.

Developed DMA/PCI-E Linux kernel module.

Involved in every phase of this project i.e. [Requirement, Design, and Coding/debugging/Unit/Integration testing Code Optimizations].

Integrated different modules like L2/L3 modules, Platform and Driver integration and then involved in Integration testing of Whole System.

Client

Nokia Siemens Network china

Clarify CRM software:

Description

This Project is a CRM software enhancement and development. This software is based N-Tier client/server architecture. We had different projects that are released every 2 months.

Development Environment

Tuxedo [MiddleWare], Clarify10.1 CRM, C, Solaris [Shared library/Static library, Shared memory, Shell scripting, IPCs, Makefile], Sybase, PCVS

Roles & Responsibilities

I had worked on the CRM software in backend side. On backend Solaris server is running that fulfills the client request. I was involved to develop Server side software as well as client side software written in C language and using middleware Tuxedo Design, Coding/debugging/Unit testing, Code Optimizations, Guiding junior resources

Client

Vodafone Spain

NetStorm:

Description

NetStorm is a web performance/Load testing product that is used to provide a real world performance & capacity measure by utilizing all three - analytical modeling, simulation and measurements techniques of performance evaluation.

NetStorm tests the capacity of a web application (or System under Test or simply SUT) by emulating real world users accessing the web application.

Development Environment

C, Linux,Multiprocessing, Shared memory, Shared library

Shell scripting, IPCs, HTTP/TCP/IP, Makefile, Pgsql, CVS.

Roles & Responsibilities

Requirement analysis/gathering, Design, Coding/debugging/Unit testing, Code Optimizations and guide juniors as well.

Organization

Cavission System Pvt. Limited.

Embedded Graphics Controller (EGC):

Description

This Project is a CRM software enhancement and development. This software is based N-Tier client/server architecture. We had different projects that are released every 2 months.

Development Environment

C/C++, Altera NEOS II Processor/DSP, On Chip CPU(OCU), HAL(Hardware Abstraction Layer),SPI, Windows, DDK, Graphics Device Driver, Visual Studio, NIOS Development Kit (Nios II SDK), JTAG Interface/Remote debugging.

Roles & Responsibilities

This project is related to development/enhancement of a Graphic/Display Controller Chip.

My Task includes development/enhancement/debugging of System-On-Chip (SOC)/Graphics Controller Modules (EngineWare/Firmware), 2D Graphics, Interaction/integration between Graphics Driver and Graphics controller (EngineWare). The device can act as a standalone device or can be plugged to a host.

Apart from that I have done as follows task:

SROM and SPI card Driver for Erasing, Writing and Reading the data.

Prepared some Standalone [Freestanding] demos to show graphics chip capability.

Benchmarking.

Code Optimization.

Client

Euphonic Technologies, Japan

RTLD (Run Time Linker):

Description

This project involved to port Open-Solaris that is running on [i386, AMD64, sparc] processor to ARM processor.

We have ported Run time Linker (ld.so.1), its dependent libraries/tools, Kernel Run Time Linker, securities libraries and LIBC to ARM processor. Run time Linker is the heart of Open-Solaris. After porting we have enhanced the performance of Run Time Linker.

Development Environment

C, Assembly (ARM, i386), ARMv6, Solaris, GNU Arm Tool chain, Sun Compiler/Linker, GNU Linker Script, Makefile, Shell-Script

Roles & Responsibilities

Understating the ELF binary format and Run time Linker/Loader concepts, ABI of ARM and i386, ARM/i386 architecture, shared Libraries, Compiler tool chain, Open-Solaris kernel and its environment .

Coding, Debugging, and testing and also interaction with client and ODC Engineers.

Enhancement of Run time linker performance.

Client

NECST Kobe, Japan

Motion Surveillance System (MSS):

Description

MSS is designed to remotely monitor the activities at remote site. Whenever any kind of motion or movement at remote side is detected, this software capture the only these motion detected images and store these images files in a directory and send the mail for this motion or movement.

Development Environment

C, Linux, Assembly, Makefile, Scripting.

Roles & Responsibilities

Responsibility:

1)Study of V4L API’s and Video Driver in Linux.

2)Controlling the video cameras through ioctl.

3)Converting raw images to JPEG using JPEG Library.

Client

IAP Tokyo.

Remote Monitoring System (RMS):

Description

RMS is designed to monitor the activities at remote location. It is designed to capture the Images with different web cams at different locations that are sent over network and these images are stored in the File repository and corresponding information into the database and then these images are streamed on to the T-Engine client. This project is enhanced later to add and register any number of cameras.

This has been divided into following modules for development-

Camera Adder Module: This module is used to add a new camera to the system

Camera Registration module: The system gets the camera details like Location, Position and Time zone based on the given Camera Id and Password and register the above value against a selected camera.

Image capturing Module: Capture raw images from web cam, compress these images into jpeg images and sends them to the storing server.

Storing Server Module: Receive images and stores them in the file server and the corresponding information to the Database.

Web Server Module: Fetches the images from Storing module and sends them to the requesting client (T Engine and NTT DoCoMo Mobile Handset).

Image Display Client: Displays image on T-Engine and Mobile handset

Development Environment

C, Linux, RTOS (T-Kernel), Multithreading, ASP, Java (I-Appli), and Mysql.

Roles & Responsibilities

Study of V4L API’s and Video Driver in Linux.

Controlling the video cameras through ioctl.

Converting raw images to JPEG using JPEG Library.

Client

Faith Inc Japan

POC Projects: Online Radio and FLV Streaming (FLVS):

Description

Online Radio is designed to listen online music (MP3). There is a broadcast server, which accept client request and send MP3 data over the network.

We have modified existing open source code as per our requirement to demonstrate to the client.

FLV Streaming (FLVS): FLV streaming is used to convert any movie format (e.g. .mpg, mv, mp3 etc) to flv format & send the mail for confirmation if conversion is done successfully, update the database according to this.

Conversion is done after every 1 minute automatically through CRON Job.

There are two modules:

Upload module: This module (At Client Side) is used to send or upload any type of movie along with some information to the server.

Conversion module: This module (At Server Side) is used to convert these uploaded images into flv and send the confirmation mail to the client side and update database according to this.

Development Environment

C, Linux, Perl Scripting, Java/JSP, MYSQL,

Roles & Responsibilities

Programmer, Documentation, Debugging and Testing.

Contact this candidate