Ph.D. candidate

Location:

Blacksburg, VA

Posted:

September 18, 2020

Contact this candidate

Resume:

Mohamed W. Hassan

RESEARCH INTERESTS

Configurable computing, High-performance computing (HPC), Graph processing, FPGA implementation and optimization, Computer architecture, OpenCL optimization, Performance modeling, Hardware profiling, Architecture-aware optimizations, Quantum computing EDUCATION

Virginia Tech, Blacksburg, VA, USA - Ph.D.

August 2013 – present

Major: Computer Engineering (GPA: 3.72) Advisor: Prof. Peter Athanas

● Dissertation: Using Workload Characterization to Guide High-Performance Graph Processing

● Relevant coursework: Computer architecture, network architecture and protocols, design of systems on a chip, configurable computing, theory of algorithms, electronic design automation, translator design and construction, testing & verification of digital systems Arab Academy for Science and Technology (AAST), Alexandria, Egypt - MSc. September 2010 – August 2013

Major: Computer Engineering (GPA: 3.71) Advisor: Prof. Yasser Hanafy

● Thesis: Using reconfigurable computing in the implementation of application specific architectures to solve dense linear systems

Arab Academy for Science and Technology (AAST), Alexandria, Egypt - BSc. September 2005 – June 2010

Major: Computer Engineering (GPA: 3.85)

Arab Academy for Science and Technology (AAST), Alexandria, Egypt – IGCSE International General Certificate of Secondary Education from Cambridge University, UK September 2002 – June 2005

EXPERIENCE

● Graduate Teaching Assistant, ECE department, Virginia Tech, VA, USA 08/2020 – 12/2020

Supervisor: Mark Devito

ECE/CS 5485: Networks and Protocols

● Internship, USC-ISI (Information Science Institute), VA, USA 05/2020 – 08/2020

Supervisor: Dr. Andrew Schmidt

Description: Replacing Aging Programmable Electronics Rapidly (REAPER)

● Graduate Teaching Assistant, ECE department, Virginia Tech, VA, USA 01/2020 – 05/2020

Supervisor: Dr. Randy Marchany

ECE 4560: Computer and Network Security Fundamentals

● Graduate Research Assistant, CCM Lab, Virginia Tech, VA, USA 01/2020 – 05/2020

Supervisor: Prof. Peter Athanas

Description: Workload characterization for graph processing on heterogeneous systems

● Graduate Research Assistant, Synergy Lab, Virginia Tech, VA, USA 01/2018 – 01/2020

Supervisor: Prof. Wu-chun Feng.

Description:

■ Development and testing of heterogeneous computing productivity tools

■ Hardware profiling & FPGA-specific optimizations for OpenCL kernels

Artifact: “Exploring FPGA-specific Optimizations for Irregular OpenCL Applications,” ReConFig’18

● IBM Qiskit Camp, Yorktown Heights, NY and Killington, VT, USA 02/2019

Host: IBM T.J. Watson Research Center

Description: Development of a quantum arithmetic library (QArithmetic) with the IBM Q Qiskit programing model

● Guest Lecturer, Virginia Tech, VA, USA 01/2019 – 05/2019

Supervisor: Prof. Wu-chun Feng

Description: Guest lecturing in CS 6504: Quantum Computing for Computer Science and Engineering

● Internship, Los Alamos National Laboratory, NM, USA 05/2018 – 08/2018

Supervisor: Dr. Scott Pakin

Description: Development of a high-level compiler for the D-Wave quantum annealer (C-to-D-Wave)

Artifact: “C to D-Wave: A High-level C Compilation Framework for Quantum Annealers,” HPEC’19

● Research Engineer, CCM Lab, Virginia Tech, VA, USA 01/2015 – 05/2017

Supervisor: Prof. Peter Athanas

Description: FPGA-based hardware acceleration for satisfiability problem (SAT)

Artifact: “Hardware-Accelerated SAT Solvers - A Survey,” JPDC, 2017

● Research Engineer, SmartCI, Virginia Tech-MENA, Alexandria, Egypt 08/2013 – 12/2014

Supervisor: Prof. Yasser Hanafy

Description: Coarse-grained reconfigurable architectures for sparse linear algebra application domain

Artifact: “High-Performance Sparse LU Solver FPGA Accelerator Using a Static Synchronous Data Flow Model”, FCCM, 2015

● Lecturer Assistant, AAST, Alexandria, Egypt 08/2010 – 08/2013

Supervisor: Prof. Mohammad Abouel Nasr

Description: Courses in computer architecture, digital logic design, and computing systems PUBLICATIONS

● Hassan, M. W.; Athanas, P., “(GALE): Graph Analytics Learning Engine for Tailored Heterogeneous Acceleration of Graph Analytics”, International Symposium on Computer Architecture and High Performance Computing (PPoPP), Februray 2021. [under review]

● Sathre, P.; Gondhalekar, A.; Hassan, M. W.; Feng, W., “MetaCL: Automated “Meta” OpenCL Code Generation for High-Level Synthesis on FPGA,” High Performance Extreme Computing

(HPEC), September 2020.

● Hassan, M. W.; Pakin, S.; Feng, W., “C to D-Wave: A High-level C Compilation Framework for Quantum Annealers,” High Performance Extreme Computing (HPEC), September 2019.

[Innovative paper award] [Best paper finalist]

● Hassan, M. W.; Helal, A. E.; Athanas, P.; Feng, W.; Hanafy, Y. Y., “Exploring FPGA-specific Optimizations for Irregular OpenCL Applications,” International Conference on Reconfigurable Computing and FPGAs (ReConFig), December 2018.

● Sohanghpurwala, A. A.; Hassan, M. W.; Athanas, P., “Hardware-Accelerated SAT Solvers—A Survey,” Journal of Parallel and Distributed Computing (JPDC), 106:170-184, August 2017.

● Hassan, M. W.; Helal, A. E.; Hanafy, Y. Y., “High-Performance Sparse LU Solver FPGA Accelerator Using a Static Synchronous Data Flow Model,” 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2015.

● Hassan, M. W.; Abouel Farag, A. A.; Hanafy, Y. Y., “NOA’S-Arc: NISC-based, Optimized Array Scalable Architecture,” 56th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), August 2013.

AWARDS

Virginia Tech – Middle East / North Africa (VT-MENA) Ph.D. Fellowship, 2013-2018. Intel Innovator – Official Intel OneAPI innovator, 2020-present SKILLS

Languages ● C, C++, Python, OpenCL,

● VHDL, Verilog

● Java, MATLAB, assembly languages

High-Level Synthesis (HLS) ● Altera/Intel Offline Compiler (aoc)

● Xilinx (sdAccel)

● LegUp

Hardware Design ● Altera Quartus

● Xilinx ISE design suite

● TORC

Quantum Computing ● D-Wave’s Ocean software development kit

● IBM Q Qiskit

Compilers ● GCC, LLVM, Clang