Design Engineer Designer

Rajat Dixit

Mob : +91-955*******

**********.*****@*****.***

OBJECTIVE: To explore my vision by continuous learning and working on challenging assignment in a competitive environment thus delivering the best of my abilities.

AREA OF INTEREST

Embedded Hardware Design and Testing,VLSI, Physical Design Simulation and Verification, EDA tools, Analog IC Design

SKILLS

Hands-on experience in embedded design softwares.

Analog circuit design at block Analog/Mixed signal.

Hands-on experience in complete Analog design cycle - transistor level design, SPICE circuit simulation, parasitic extraction, post layout simulations and layouts.

EXPERIENCE (1 year 3 months)

R&D EMBEDDED ENGINEER-JSD ELECTRONICS INDIA PVT. LTD,NOIDA (AUGUST 2019-PRESENT)

DUTIES AND RESPONSIBILITIES

Worked in developing and designing hardware components including circuit boards, switches, microcontrollers, and networking elements.

Implemented DFMA modifications to existing hardware components and systems based on changes in functional requirements or use cases.

Design Process involved component tests throughout the design process, testing the elements individually and together with other hardware systems.

Experienced in Altium schematic Capture/Simulation or similar tools.

Created all the document starting from market research of existing products to specification finalization, block diagram of the new projects.

Colaboration with Software Developers during the development cycle and testing of the hardware during the process.

Experienced in life cycle of Electronics hardware design and development, PCB Design, Schematic design of IoT- product range development which includes BLE, GSM (2G/3G, 4G) modules, GPS (GNSS + IRNSS) modules, Wifi technology.

Skilled in microcontroller (STM32, STM8L) based system design and low level driver development.

Proficiency with hardware interfaces such as UART, SPI, GPIO, I2C, ADC, RS232, USB, BLE, Wi-fi.

Responsible for BOM optimization,Pcb design from Schematic to Gerber,layout, fabrication & assembly drawings.

TRAINER, ENN TECHNOLOGIES, DELHI (JUNE 2019-AUGUST 2019)

Worked as trainer/teaching professional and imparted practical knowledge to B.Tech students in the field of VLSI designing,VHDL programming,VERILOG programming.

TOOLS AND LANGUAGES

EDA Tool kit : Synopsys Custom Designer, Mentor Graphics Pyxis, Altium Designer

Simulation Tools : Eldo, Spice

Verification Tools : Calibre,IC Validator

Softwares : Proteus, Modelsim, Comsol Multiphysics, Keil uvision, HSPICE

Languages : Python, C++, VHDL,Embedded C

Microcontrollers : 8051, STM32, STM8L

Documentation Tools : LaTex, TeXnic Centre, MS Office

Operating System : Windows, Linux(Redhat)

M.TECH DISSERTATION

CMOS Transimpedance Amplifier for Current Measurement on Nanodevices with Low Noise on 130nm CMOS process using Synopsys Custom Designer.

KEY PROJECTS UNDERTAKEN

Design Automatic Hand Sanitizer and IR Thermometer during COVID-19.

Working on Battery Management Systems (BMS) in schematic level.

Working on Automatic GSM Cell Motor Starter in schematic level.

Design BLE Sensors : Range of products for Vehicle Telematics Eg. TPMS, Door Sensors, Temperature & humidity sensor.

Design of Vehicle Tracking System : Designed a IOT based AIS140 vehicle tracking system using Altium designer comprising of GSM and GPS modules and microcontroller.It is an ARM microcontroller(STM32G070CBT6)& Quectel MC66(GSM MODULE) and L89 (GNSS + IRNSS GPS MOUDLE) based device which is use for live vehicle tracking and other parameter of automobile.

Design of GPS ID CARD : It is an IOT based personal tracker made with help of ARM microcontroller(STM32F070F6P6), Quectel-MC60(GSM AND GPS MODULE ) based device which is use for live tracking.

Design of NB-IOT : It is an ARM microcontroller (STM32F070CBT6), ESP-WROOM-32 (Wi-fi Module) and BG 96(4G GSM MODULE) based device which is use for collecting data form a medical device and transmit it over internet using WiFi or GSM.

Design of Miller Compensated Operational Amplifier for Sensor Interface : Designing on 130nm CMOS process using Mentor Graphics EDA tool from behavioral level to layout and post verification level.

EDUCATION

2015-2017 JAYPEE INSTITUTE OF INFORMATION TECHNOLOGY

M.Tech with Electronics and Communication specialization in Microelectronics Systems and Embedded Technology with 6.8 CGPA i.e. 68%

2009-2013 GL BAJAJ INSTITUTE OF TECHNOLOGY& MANAGEMENT

B.Tech with Electronics and Communication with 61.04%

2007-2009 CITY MONTESSORI SCHOOL,LUCKNOW (ISC,New Delhi)

Passed with 74.50%

2007 CITY MONTESSORI SCHOOL (ICSE, New Delhi)

Passed with 80.70%

ACCOLADES

Secured 93.48 percentile in GATE-2015.

Publication in International Journal-Design of Low Phase Noise and Wide Tuning Range Voltage Controlled Oscillator for Modern Communication System, Vol. 7 –Issue 6(June-2017), International Journal of Engineering Research and Applications (IJERA), ISSN: 2248-9622.

PERSONAL INFORMATION

Date of Birth : 7th February, 1991

Father name : Mr. Rakesh Dixit

Sex : Male

Nationality : Indian

Marital Status : Single

Languages : English, Hindi

Declaration: I hereby declare that above provided information is true to best of my knowledge.

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