Electrical Engineering,Computer programming

Ramya Vasilanka

309-***-**** **************@*****.***

Education

Bradley University, Peoria, Illinois, USA May 2020

Master of Science (M.S) Electrical and Electronics Engineering GPA 3.9 /4

Jawaharlal Nehru Technological University, Anantapur, India May 2015

Bachelor of Technology (B.Tech) Electronics and Communication Engineering GPA 3.5/4

Professional Experience

Software Engineer - NTT Data Global Delivery Services, Bangalore, India Sep 2015 – July 2018

Worked in IBM Mainframes environment as part of a six-person team for Yum! Project

Yum! Project operates the brands – KFC, Pizza Hut and Taco Bell Worldwide.

Monitored all batch jobs and fixed job abend using Tivoli Workload Scheduler (TWS).

Hands on experience on CMOD (content manager on demand tool) and in BMC remedy ticketing tool.

Knowledge on basic SDSF (System Display and Search Facility) commands.

Ensured timely completion of the batch cycles, hold, Force complete, Rerun and schedule the jobs.

Developed the knowledge in scheduling the jobs and jobs stream as per Adhoc requests.

Added/Removed the dependencies to the batch jobs which are in Current Plan (CP).

Modified the JCL as per the request and logged on bridge calls and conference calls.

Coordinated with client team during production moves and supported.

Debug the error, fixed the space, contention errors and fixed some production jobs.

Graduate Assistant

Bradley University - for Dr. Yufeng Lu Jan 2019-May,2020

Supervising the Embedded Systems lab and provided technical support in using the labs.

Teaching Assistant

Bradley University - for Dr. Prasad Shastry Jan 2019-May,2020

Provided the lab maintenance and helped the professor in preparing the document of Electrical Engineering Circuits course.

Bradley University - for Dr. Young Soo Kim Aug,2018 – Dec,2018

Assisted undergraduates in Microcontroller Architecture & programming course and resolving their doubts during simulations.

Software Skills

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IBM Tools– Tivoli Workload Scheduler Z/OS 1.12 BMC Remedy 8.0, CMOD-IBM on demand32 8.5

IDE: Keil, Eclipse, STM32Cube, Silicon Labs

Programming Languages: Embedded C, Python, VHDL, JCL, Basics of UNIX, Linux

Design Tools: MATLAB, Simulink, Xilinx ISE Design Suite-14.7, Xilinx Vivado 2019.02, Advanced Design System (ADS)

Equipment: Beagle Bone, Xilinx PYNQ, Nexys 4 DDR, ESP8266 boards, ARM Microcontrollerand FPGA Boards

Protocols: TCP, UDP, DNS, HTTP, FTP, SMTP, CAN bus

Operating Systems: Windows and Linux

Microsoft Office including MSWord, PowerPoint, Visual Studio

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Knowledge on Verification and Validation process, Risk Management, Design Control

Studied Embedded C, Microprocessor Architecture, Digital Signal Processing, Radio Frequency circuits & Systems, Embedded TCP/IP, Microcontroller Linux, Coop control Multiagents, Dynamic system Analysis

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Research & Publications

Analysis of EEG to predict future Panic Attacks

Predicting panic attacks by analyzing the brain activities through electroencephalogram (EEG) using MATLAB.

Rapid FPGA Implementation of Independent Component Analysis -Poster Presentation

Co-author of Rapid FPGA Implementation of Independent Component Analysis for EEG Preprocessing

In this paper, we developed a Brain Computer Interface platform and supporting tools for ICA algorithms for achieving high performance.

Poster presented at the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC'19) to be held at the City Cube Berlin, in Berlin Germany 23-27 July 2019.

Academic Project

VHDL Projects:

Designed a 9-tap FIR filter with Adder, Multiplier, D-flipflop blocks in VHDL and verified the functional block using the test bench in Vivado.

Synthesized and Implemented the Sign Magnitude Adder and Barrel Shifter on Nexys 4 DDR FPGA board using constraint file in Vivado.

Designed IEEE 754 32-bit single precision natural logarithmic in VHDL using Flopoco generated blocks.

Flocking Algorithm:

Design and Simulating the co-operative control law for a group of linear multi agent systems using

MATLAB.

ESP8266 Development board tested

Tested for interfacing between client-server in TCP and UDP.

Multi-page web server interfacing for control of ESP8266 board using python.

Low Noise Amplifier

Designed a GaAs FET LNA at 2 GHz using the different design tools –Computer Aided Modelling, Analysis and Design (CAMAD), MATCH, Micro-STRIP, Advanced Design System (ADS)

Dual tone multiple frequencies (DTMF) digit detection algorithm

In MATLAB, Worked on Dual tone multiple frequency using Short Fourier Transform

Implemented ARM NEON SIMD Instructions on PYNQ Board

Performed the SAD (Sum of Absolute Difference) function by employing NEON inline assembly instructions, and reduced the cycle time using Xilinx PYNQ Board.

Advanced Security System

Worked as a part of four-person team for project to secure the property against theft, crime, fire, etc. and to detect the pre-empt hazards.

Hardware and Tools requirements for this system are ARM7 Microcontroller, GSM Module, and Display with Keypad, Flash Magic, Power supply and Mobile Phone.

Implemented an advanced security alert which allows only the authorized persons into a high security zones by using One-time password (OTP) which will be sent to the authorized person’s mobile numbers as preferred by the owner.

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