KAVITHA R

Email ID: adejdl@r.postjobfree.com

Contact No: 735-***-****

SUMMARY:

* **** ********** ** ******* and server Platforms at US Technology international Pvt Ltd (Client – Intel Technology India Pvt Ltd), Bangalore.

History of being an effective team member with full understanding of the underwriting process and the team needs.

Worked in Firmware Flashing Tool, creating virtual machine and triggering automation.

Dedicated to enhancing underwriting department operations with an analytical and disciplined approach.

Able to work with minimal direction to solve problems, resolve conflicts and responds to customer enquiries.

Smart validation engineer with extensive documenting and reporting skills and accurate record keeping.

An enthusiastic professional tasked employee with effective analysis

Knowledge and Experience in creating Virtual Machine for Azure Validation

Knowledge and Experience in Nervana Card(Spring Hill) validation

Experience:

UST GLOBAL, Bangalore- Validation Engineer

April 2019- Present

Project Name : Tools and Utilities Validation for Server

In Band Tools Validated : Syscfg, Iflash 32, Sysinfo, FRUSDR, Selviewer, OFU, FWPIAUPD

OOB-Band Utilities Validated : SDPTool, Azure, IMSM, SNMPSA, EWS, DCM Console and IASC

Platforms Used : Grantley, Walker Pass, Purley, Whitley and Silver Pass.

UST GLOBAL, Bangalore- Validation Engineer

Client- Intel

May 2017 – April 2018

Project Name : Platforms Tools Validation.

Tools Validated : Systems Scope tool, Thermal Analysis Tool, Firmware Flashing Tool, Cycling, Wimager and JAMA

Platforms Used : Coffee Lake -U & F, Kaby Lake S & R, Cannon Lake, Gemini Lake and Ice Lake.

SKILL SET:

OS : Windows, Linux (RHEL,UBUNTU,SLES & CentOS)

PROGRMMING SKILLS : C, C++, SQL and Java

Certification:

Undergone training in Java

Undergone In Plant Training in Embedded system

ROLES AND RESPONSIBILITIES:

•Analyzing power and performance of Intel’s Server platforms with various benchmarks.

•Provided weekly Build Regression Support by executing test cases evaluating test results and maintain of new/fixed bugs.

•Involved in the integration and regression testing. Involved in full cycle of QA Regression.

•Involved in exploratory testing due to which corner case bugs were uncovered in both host software and controller firmware.

•Reporting – Bug, Defect, Daily Status and weekly Status and fault reporting to the test lead.

Education

S.A.Enginnering College, Chennai- B.E

September 2012- April 2016

CGPA -7.5/10

Specialization in Electronics and Communication

Developed Cellphone Detector using IC555

Contact this candidate