Electrical Engineer Design

Avi C. Patani

**** ********* **, #***, ***** Clara, CA 95051 C: 562-***-**** **********@*****.*** SUMMARY

Electrical Engineer adapt at all aspects of computer engineering, including hardware and optical design. Looking to obtain a position of Electrical Engineer, which effectively contributes to my and the organizations growth. PROFESSIONAL EXPERIENCE

Optical Test Engineer

Bossa Nova Robotics – Mountain View, CA

• Developed and performed optical tests on lens, camera, light systems

• Developed Matlab tools to quantify image quality

• Robot optical modeling to get maximum coverage while shelf detection

• Worked towards the modification camera-light systems for glare mitigation Feb 2020 – Present

Test Engineer 2

Verily Life Sciences- South San Francisco, CA April 2017-Dec 2019

• To create test environments and inspect optical lens for depth sensing.

• To validate the various electrical parameters in lens circuitry.

• To measure the image quality parameters (MTF, aberration, distortion etc)

• Provide support to the failure analysis lab and help debug various issues and defects

• Assist in setting up an automated system for in-house testing and failure analysis.

• Create processing tools using and Python for data analysis. Test Engineer

Microsoft Corporation- Mountain View, CA Oct 2015-April 2017

• To create test environments and validate CMOS image sensor pixels for Hololens.

• Prepare test cases and parameters, setup, and run a broad suite of tests on sensor hardware and Systems.

• Use prototype boards to validate the sensors in and external environment

• Provide test data, analyze these data, and provide recommendations that will help to evaluate the VLSI Design Verification Engineer

SSR Labs – Pacifica, CA

• To design and verify very large capacity memory systems using Verilog and System Verilog

• Developing and modifying new design or verification IP.

• Writing and running tests to improve measured coverage

• Adding assertions and coverage statements to verification IP. June 2015 – Oct 2015

Education

Master of Science: Electrical Engineering Dec 2014 California State University

Long Beach, CA

GPA: 3.5/4.0

Bachelor of Engineering: Electronics and Tele-Communication Engineering May 2012 University of Mumbai

Mumbai, Maharashtra, India

GPA: 3.3/4.0

SKILLS

• Programming Languages: VHDL, Verilog, System Verilog, RTL Scripting, Python

• Tools: Xilinx ISE, Cadence Virtuoso, Modelsim, OrCAD, PSpice, VCS, MATLAB, HSPICE, and Synopsys TCAD, Solidworks, JMP, Imatest

• Other Skills: Technical writing, Business communications, Project management, Manufacturing. Verification Methods IC Design Technologies Engineering Concept UVM, OVM, VMM Mixed Signal Design Amplifier Design Functional Verification Physical Design Op-Amp design DFT and LVS SRAM Design Electrical Circuit Design

Silicon Debugging FPGA Oscilloscopes

Constrained Random Generation NAND Spectrometers

Boundary Scan SSD Controller ADC/DAC Controllers

JTAG Flash Memory Digital Signal Processing

Static Timing Analysis Nano and Micro design AMBA Architecture Failure Analysis Memory Architecture PCI Express

Gate level Simulation CMOS/MOSFET BJT

ATE Design VLSI Design PCB Design

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