Engineer Industrial Training

+919*********

addpbu@r.postjobfree.com

Riya Sharma

Seeking a position in your organization to utilize my educational qualification, logical and Coding skills for mutual growth and success.

An enthusiastic Engineer with highly motivated and leadership skills having bachelors of technology degree in Electronics and Communication Engineering.

Expert in implementation of each step of project.

Eager to learn new technologies and methodologies.

Strong Digital Electronics Concepts.

Able to write Test bench in Verilog and VHDL.

Good in designing Finite State Machine(FSM).

Digital Logic Design and Static Timing Analysis.

FPGA design/RTL design flow with fluency in HDL

coding.

Good control on VHDL/Verilog HDL in RTL synthesis point of view.

Good Experience in integration and implementation of RTL modules and on board testing.

Experience in EDA tools like Xilinx ISE, System Generator and ModelSim.

Experience of using real time debugging tools like Xilinx Chip Scope Pro and Logic analyser.

Good knowledge of Spartan3E and Virtex-5 FPGA’s

architecture in HDL languages (Verilog and VHDL).

Hands on Design and implementation of FPGAs.

Develop and implement block level RTL, perform synthesis and achieve timing closure.

CAREER

OBJECTIVE

PROFILE

SUMMARY

CORE

QUALIFICATION

Bachelor of Technology from Krishna Engineering

College with 69.6%.

Metric in PCM from Government Girls Senior Secondary School.

EDA Tools : Modelsim (Mentor

Graphics)

Hardware Description Languages : Verilog, VHDL

FPGA Prototyping : Xilinx Suits (14.7)

Hardware Expertise : Xilinx FPGA Board (

Vertex ML605 and

Spartan 3E)

Mathematical Tool : MATLAB

Desktop Publishing : MS Word, MS

Powerpoint, MS Excel

Xilinx System Generator Based Hardware Co-Simulation of Adaptive Noise Cancellation Using LMS and Leaky LMS Duration -5 month

Adaptive noise Cancellation is an alternative technique of estimating signals corrupted by minimizing noise. Here, the adaptive noise cancellation system is designed and implemented on FPGA using Xilinx system generator (XSG). The two basic adaptive algorithms least mean square (LMS) and Leaky least mean square (LLMS) was implemented for ANC and various performance parameters are analysed and compared. The different performance parameters used are SNR improvement, Mean Square Error (MSE) etc. Development board used:- Xilinx Spartan 3E Starter Kit. IDE used:- Xilinx ISE and MATLAB. A VLSI trained fresher with 3 months depth training on RTL Coding using Verilog from Croma Campus Institute.

Attended Summer School on VHDL and Orcad.

Industrial Training on IE3D and HFSS Antenna Designing Tool.

EDUCATION

TECHNICAL

SKILLS

ACADEMIC

PROJECT

TRAINING

SUMMER

INTERNSHIP’S

Strong motivational and leadership skills.

Ability to produce best result in pressure situation.

Excellent communication skills in written and verbal both.

Ability to work as individual as well as in group.

Self-motivation, partnership and strong interpersonal skills are needed.

Sex : Female

Date of Birth : 10

th

Feb 1997

Nationality : Indian

Marital Status : Single

Address- 6/130, sector-2, Rajender Nagar, Sahibabad, Ghaziabad, U.P

I hereby declare that the above information is true and accurate to the best of my knowledge.

Place: Sahibabad Riya Sharma

PERSONAL

QUALITIES

BIO DATA

DECLARATION

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