SAYALI SHRIKANT VAYADANDE

Phone: 269-***-**** Email: adcp34@r.postjobfree.com LinkedIn: www.linkedin.com/in/sayali-shrikant-vayadande

SUMMARY

A highly focused & self-motivated individual with strong fundamentals in the field of Electrical engineering. Progressive working knowledge with Micro-controllers, FPGA & communications protocols with hands on experience with designing, developing, troubleshooting & testing of electronic systems looking for a full-time job to contribute my technical skills and expertise in Electrical & Automotive industries

EDUCATION

Western Michigan University, Kalamazoo MI Jan 2018 – Dec 2019

Master of Science, Electrical Engineering GPA: 3.91/4.00

Coursework: Micro-controller Applications, Application Specific IC Design (ASIC), Digital Signal Processing, Image processing

MKSSS’S Cummins College of Engineering, India June 2012 – June 2016

Bachelor of Engineering, Electronics and Telecommunications GPA: 3.50/4.00

Coursework: Digital Electronics, Digital Design, Integrated Circuits, Object oriented programming, Network Analysis, Power Electronics

TECHNICAL SKILLS

Languages: C, Embedded C, VHDL, Linux- Bash scripting

Software tools: IAR workbench, MATLAB/Simulink, Xilinx Vivado, Eagle, Visual studio

Protocols: CAN, SPI, UART, I2C, Ethernet, Bluetooth, Wi-Fi

Simulators: Mentor Graphics Modelsim, MATLAB/Simulink

Electrical equipment: Function generator, Oscilloscope, Logic analyzer, Digital Multi-meter

PROJECTS

Programmed the ARM microcontroller in Embedded C using IAR workbench as API. Jan 2018 – April 2018

Controlled conveyor belt coupled with stepper motor prototype by interfacing CAN using CAN transceiver

Derived the distance of an object & fixed point on the belt using ultrasonic sensor & displayed the measured distance on LCD using SPI

Implemented H-bridge using optocoupler to tackle the DC motor’s voltage fluctuations & reverse current issues

Successfully implemented working model for conveyor belt with 98% accuracy

Blackjack Game using Xilinx vivado IDE May 2018 – June 2018

Designed & implemented an RTL design for 1 dealer, 1 player & 1 deck blackjack game on Nexys-4 DDR FPGA using VHDL

Implemented pseudorandom number generator & Finite state machine algorithm & simulated using Mentor Graphics Modelsim simulator

Different test cases were implemented & verified, resulting accuracy of more than 500 times without failing

32-bit Floating point adder/subtractor circuit in Xilinx vivado May 2018 – June 2018

Designed & simulated RTL design & functional verification on the Nexys 4 DDR FPGA using VHDL for 32-bit floating pt. adder/subtractor ckt.

Verified different test cases to force 32-bit floating pt. no. as an input to the system and simulated with Modelsim simulator

Successfully, implemented & verified the test results against the standard results with 100% accuracy

SISO Fuzzy logic hardware accelerator module in Xilinx vivado Jan 2019 – April 2019

RTL design and functional verification on the Nexys 4 DDR FPGA using VHDL for fuzzy controller to support fuzzy model building & inference

Improved the maximum operating frequency from 25 MHz to 50 MHz (T=20 ns) leading to 12500000 fuzzy ops/sec

Verified system using different test cases & simulated using Mentor Graphic Modelsim simulator

Edge detection of brain tumor using Fuzzy C-means algorithm Aug 2019 – Dec 2019

Implemented Fuzzy C-mean clustering algorithm for an edge detection of a brain tumor using MATLAB simulation.

Analyzed & tested the performance of Fuzzy C-means algorithm with 98% accuracy.

WORK EXPERIENCE

Teaching Assistant: Western Michigan University (Kalamazoo, MI) Sept 2019 – Dec 2019

Courses: ECE-4600 Communications systems & ECE-3100 Network Analysis

Responsible to train 35 students to use MATLAB & provided them constructive feedback & resolved academic project issues.

Electrical Engineering Intern: Bhagyashree enterprises (Pune, India) May 2019 – Aug 2019

Prepared circuit and PCB designs also tested prototype assembles to assure performance within design criteria

Prepared and maintained all required engineering document files, data and resource materials

Electrical Engineer: Accord, Pvt. Ltd (Pune, India) Aug 2016 – June 2017

Conducted comparative analysis with team members to identify an efficient medical image compression technique

Collaborated with the team members to identify the efficient medical imaging compression techniques

Analyzed and tested the performance of DFT, DCT & DWT compression algorithms using MATLAB simulation

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