Engineer Design
Resume:
Saravanan.K
Mobile: 91-638*******
E-mail: *******************@*****.***
HW development professional with 5+ years of experience. Currently functioning as Tech Lead- Hardware with Votary Softech Solution Pvt Ltd,Bangalore. ATE Integration & Testing with 7 Years of experience in Defense, Aerospace and Industrial Electronics Seeking to be an effective catalyst in motivating & team building through value added initiatives, customer orientation, dedication and positively contributing to organizational growth and enhancement as ATE HW/SW integration Integration &testing,module level testing,Installation,Servicing Profile
Skilled in End-End development involving: Hardware architecture development, Feasibility analysis, Design, PCB Layout review, Testing, Debugging Management Documentation and Manufacturing support.
Experience in Design, Bringup,Testing of QuectelMC60 Based GPS Tracker, Gyro, accelerometer, Magnetometer, Barometer, Temp sensor.
Experience in Design, Bring-up, Testing of Broadcom application processors like BCM5358 & Realtek RTL8197FS.
Experience in implementation and Testing of interfaces viz., I2C, SPI, USB2.0, RJ11/SLic, PCM/TDM,10/100 Base-Ethernet, Mini PCIe, DDR2.
Experience in power design using Buck converter, Boost converter, LDO, PMIC, Battery charger, Power-Bank, Power-ON Sequencer.
Experience in Wi-Fi Module design using 802.11 b/g/n,802.11 ac Wi-Fi SoC, GPS ICs based module design.
Experience in Lab instruments Like Tektronix GHz Oscilloscope, Spectrum Analyzer, Logic Analyzer.
Skilled with design tools viz., OrCAD Capture,Altium,Allegro PCB and documentation tools viz.,MS office and MS Visio.
Experience on board debugging and board reworking
Keen technical and logical thinking abilities
Involved in all phases of hardware development life cycle (Requirements analysis, Component selection, Development, System Integration and Documentation).
ATE Integration & Testing with 5+ Years of experience in Defense, Aerospace and Industrial Electronics
Excellent Team player with strong interpersonal, creative and leadership skills and a motivation for success.
Good logical & communication skills.
Professional Experience
Aug 2019 to till date as Tech Lead in Votarty Softech Solutions Pvt Ltd,Bangalore.
May 2016 to July 2019 as Sr.Hardware Engineer in Mbit Wireless Pvt Ltd,Chennai.
7 years of industrial experience as Customer Support and service Engineer in Indus Teqsite (India) Pvt. Ltd(Data Patterns India Pvt Ltd). Chennai, from Jun 2008 to May 2016
2 Years’ experience as Integration & Testing engineer in Meltronics Systemtech Pvt Ltd Bangalore Project Name: 4G LTE CPE Router
Role: Hardware Architect
Description:
This product is indoor 4G wireless CPE Router. It has 1 WAN +4 LAN RJ45 10/100 Mbps port. Also supports RJ11 SLIC port for Connecting LAND Line phone. Further it supports 801.11b/g/n Wi-Fi,2 port Type-A USB Port.
Responsibilities:
Work on hardware architecture design and managing hardware deliverables of an End to End Router to customer demo.
Requirement Capture
Design document Preparation
Part Selection
Schematic and BOM deliver
Layout guidelines and Stack up proposal
Layout and Gerber Review
Processor-BCM5358; Modem – WWAN M.2 Modem; Interfaces –DDR2, 10/100 Ethernet, USB, Flash ROM, UICC, I2C, JTAG, 802.11 b/g/n, UART, Battery charger. SLIC. Design Tools
Cadence Allegro and ORCAD & Altium.
Project: 4G LTE Hotspot design
Role: Total H/W Design (Baseband + RF)
Description:
It is 4G LTE hotspot which includes Baseband IC, RFIC,Wi-Fi chipset, Battery charger, PMIC,Wi-Fi antenna .It supports
Responsibilities:
Creating Schematic for 4G-LTE Hotspot devices with multiple LTE band supports
Select the High-Performance Rx filters, Power amplifiers, Duplexer
Done the Bill Of Materials generation and released.
Board bring Up
Technology used
o LTE- 4G LTE Modem, Power management IC Unit; Wi FI- chipset, LTE Front End Parts from Skyworks, Murata, Taiyo Yuden,EPCOS Interfaces –USB, Nand Flash ROM, SPI, UICC, I2C, UART, SDIO.
Design Tools
Cadence Allegro and ORCAD.
Project: 4G LTE chip Evaluation board design
Role: Development engineer
Evaluation Board design
Designed the board to test the peripheral and qualify the chips. Project Description :
This board is designed to evaluate the BBIC processor chip. This broad designed with one PMIC(power management chip),its contain 4-DCDC and 10 LDO's with I2C interface. Power ON Sequencer is used to power up the BBIC as back up for PMIC.The SIM card interface,memory card .interface with chip through the SPI,LCD interfaced with through the SPI. The RFIC was interfaced with chip through the RBDP interface with 3-wire SPI control interface.
Peripherals : SIM card interface, SPI-SDcard, SDIO,OELD & LCD.
Current sense : Used the shunt sense method to monitor the current.
Memory interface : SPI-flash.
Analog device :RFIC interface with SPI control interface.
Power Supply :PMIC,DCDC and LDO
Oscillator :32.768KHz & 26MHz
Project Name : GPS Tracker
Role: Hardware Architect
Description:
This product is tracker solution for kids, pet, elderly,luggae.Quectel MC60 SoC GPS Tracker with has both GNSS and GSM support. It have GEO fencing support and can give immediate alert if person cross withinlimit.
Responsibilities:
Work on Hardware architecture design and board bring up ..
Requirement Capture
Design document Preparation
Part Selection
Schematic and BOM deliver
Layout guidelines and Stack up proposal
Layout and Gerber Review
Project Name : Health Band using Heart Rate Monitor Role: Hardware Architect
Description:
The Health band incorporates MT2523 Mediatek SoC with ROHM make Heart rate sensor which can sense the heart rate of the person wearing to cloud. Also includes step counter, Calorie counter, Barometer pressure sensor.
Responsibilities:
Schematic design..
Component Selection.
BOM Generation.
Gerber Review
Board bring up & Testing.
Education
Sl.No
Level of Education
Institution
Board/University
Year of
completion
Percentage
1
S.S.L.C
Zamindar Hrsec school
,Thuraiyur
State Board
1999
89%
2
HSSC Sengunthar Hrsec school
,Thuraiyr.
State Board
2001
68.58%
3
DEEE
Seshasayee Institue of
Technology,Trichy
DOTE
2004
65.00%
4 BE(ECE)-Part Time Sathyambama University,
Chennai
Sathyambama
University, Chennai
2014 6.85% CGPA
Personal Information
Father’s Name : N.Krishnan(late)
Date of Birth : 21st Oct 1983
Marital Status : Married
Nationality : Indian
Languages Known : Tamil & English(write,read,speak). Contact Information
Permanent Address
7,Marutha Muthu lane,Thuraiyur-621010.Trichy District. Declaration
I hereby declare that the above furnished details are true to the best of my knowledge Place: Chennai Your’s faithfully
Date: K.Saravanan
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