Sign in

Design Engineer Project

New Delhi, Delhi, India
October 04, 2019

Contact this candidate




Profile: Mobile: +91-981*******, 694/27 West Ram Nagar, Sonipat, Haryana OBJECTIVES

Energetic, result oriented and eager to bring strong technical competencies along with excellent organization, communication and relationship building skills, articulate and friendly with a professional demeanor to a renowned company.


• Currently Working in VEDA DEFENSE SYSTEM Pvt Ltd as Design Engineer.

• Worked with DEFSYS Solutions Pvt Ltd as an Integration & Testing Engineer.

• Completed M. Tech in “VLSI Design” from YMCA University, Faridabad.

• Completed Certification course in “Verification using Verilog & System Verilog” from DKOP Labs Pvt Ltd, Noida.

VEDA DEFENSE SYSTEM PRIVATE LIMITED. (Jan 2018-Present) Designation: Design Engineer

Responsible for managing project deliverables in line with the project plan. Preparation of PFMEA, Control Plan, Configuration Control Matrix and detailed project work plan. Responsible for getting answers of all technical queries from Customer and Vendor POC’s.

Roles/ Responsibilities:

Project 1: Unmanned Aerial Vehicle

• Working on integration, designing and improvising existing system according to the requirement.

• Successfully completed the training module on integration and testing of system.

• Managed team through the production of systems.

• Demonstrated swarm mission with systems in IAF, Pokhran and successfully passed phase two of Mehar Baba Swarm Drone competition.

Project 2: LRF Binoculars

• Track the project with MOD and SIW BSF and got PO for repair and maintenance.

• Successfully troubleshoot and repaired two units under NC-NC policy.

• Created a team and managed through the maintenance and repairing of faulty Binoculars. Project 3: ITA

Part of R&D team for design and development of Interface Test Adaptor. DEFSYS SOLUTIONS PRIVATE LIMITED. (Feb 2017-Jan 2018) Project 1: FTA (Fox Transducer Assembly). Designation: Team Leader Description: FTA is ruggedized day/ night optronic sensor system that is integrated into a host system that includes two sensors i.e. TI and CCD camera.

• Testing of Thermal Imaging Camera using Collimator and Boresight Calibration of DTV CCD Camera.

• Perform integration and boresight of FTA system and troubleshooting of System.

• Perform Environmental Stress Screening Test of system.

• Perform Acceptance test procedure, MRTD and Cross Calibration of System. Project 2: ATE (Automatic Test Equipment) Designation: Trainee Engineer

• Testing of wire harness, Power supply card and providing resources to the teammates.

• Continuity testing of OU, IU, OT, PDU & Interface Test Adapter and Full load testing of ATE’s & OT. Project 3: Maintenance of Quad, Micro Stamp and DSP HD Electro Optic Systems, Installed the Quad system on Hovercraft and imparted training to the technical persons of Coast Guard at Okha Port. Project 4: M. Tech Thesis- DCVSL v/s Conventional CMOS Logic style. [Jan-May, 2017]

• Different circuits are designed, analysed & compared by performing simulation at 180nm in TANNER EDA Tool and Represented at National Conference at SRCEM. EDUCATION

M.Tech (VLSI DESIGN) from YMCA University of Science and Technology, Faridabad. [2015-2017] B. Tech (Electrical and Electronics) from BMIET, Sonipat. [2010-2014] 12th from SDM School Sonipat with 68% marks. [2010] 10th from SDM School Sonipat with 71.4% marks. [2008] TECHNICAL PROFICIENCY

Operating System : Windows xp, 2000, 98, Windows Vista, 7, 10 Office Suite : MS Office (Word, Excel, Power Point, Visio) Application Software : Tanner EDA, XILINX, FTA CDU, ModelSim Familiar Concepts : Digital Electronics, Network Analysis, CMOS Design Languages : Verilog, System Verilog, Basic of C Programming, VHDL ACHIEVEMENTS

• Qualified GATE 2017 ECE with score 522.

• Qualified GATE 2016 EE with score 485.

• Qualified GATE 2015 EE with score 495.

• Worked as an efficient team member in organizing technical and cultural events at school and College.

• Represented current company in Mehar Baba Swarm Competition and cleared two phases. KEY SKILLS

• Acclimate and assiduous in avocation.

• Alacritous learner with efficacious attitude and confidence.

• Able to prioritize tasks under minimal Supervision, Self-Motivated and Focussed. DECLARATION

I hereby declare that the above-mentioned information is correct up to my knowledge and I bear the responsibilities for the correctness of above mentioned particulars. Place: New Delhi MOHIT ANTIL

Contact this candidate