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Principal Engineer

Pocatello, Idaho, United States
September 17, 2019

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George Logsdon

Pocatello, Idaho


Empowered by a tenacious spirit that responds to bottom line challenges with a customer focus on the process. Career based on successfully implementing innovative and imaginative solutions to the ‘never seen this before problems’ within semiconductor manufacturing using the LSS (Lean Six Sigma) DMAIC, DOE and DFSS methodologies to reduce variation. Exceptional at collaborative team effort using appropriate hardware and software to make complicated things simple. Gets the most out of blending data between multiple Information Technology systems to aid decision making related to resource allocation (capital budget, staffing, Work In Process materials).

2018 – Present Retired

(Volunteer work: “ASEP Certified multi-sport coach, USA Archery Level 4 coach, level 3 coach trainer)

Jan 2011 – March 2018 ON Semiconductor

Principal Industrial Engineer (Pocatello, Idaho)

Utilized the full Software Development Life Cycle to create a culture changing process for full factory decision support that is used 9000+ times per day with 95% compliance based on the ‘voice of the customer’ inputs.

Process ensuring that the status and location of every lot and the availability/qualification of every tool/chamber is properly comprehended for the best automated decision making in near time. Focus maintenance efforts on the most important tools for outs compliance. Eliminated WIP lot searches and automation recipes restrictions!

Process included many custom designed status reports/dashboards used multiple times per hourly on the shop floor up to weekly and monthly at the Senior Vice President staff meetings.

Process recognized as the ‘best in company’ prescriptive dispatching and compliance reporting methodology throughout all wafer fab sites. Utilizes TortoiseHg and Mercurial software for both change control and collaboration.

2008 – 2011 Retired

(Volunteer work: “Red Cross, CERT, MERT, HAM”, International Travel, Golf)

1983 – 2008 National Semiconductor Corporation (multiple positions)

Principal Process Engineer (Arlington, Texas)

Excellent skills in change management using situation, problem, decision and root cause analysis resulting in problem prevention process development for both common and special causes systems. Expertise learning new areas with ‘never let it happen again’ project charters.

Defined standard processes and procedures and lead a successful turnaround effort of a $3m annual business production system (Wafer Services Group) for non-product wafers.

Lead technical resource in SIX SIGMA teams to create productivity measurement systems.

oFirst project (IPAT) produced a 59% increase in direct labor productivity. Six sigma cost control benefit calculated at $5.6m annually.

Lead cross-functional team’s collaboration in defining and implementing a new standardized asset startup and re-qualification process (AQUIP) that is used after maintenance intervention to eliminate excessive variability which lead to wasted time and resources. System adopted by all fabrication areas and in multiple manufacturing sites.

oSystem included a customized GUI for both maintenance and engineering data input and reporting, eliminating 95% of errors. AQUIP’s annual savings estimated at $10million.

Section Manager (West Jordon, Utah)

Second level group manager for wafer fab engineers, technicians and production supervisors in 24hr manufacturing (3x4) operations across multiple processing areas: Diffusion, Chemical Vapor Deposition, Cleans, Ion Implantation, Photoresist Striping and Wafer Grinding.

oReduced product development (NPI) cycles by 50% while saving weeks of cycle time by ensuring predictable asset performance.

oSupported Quality Systems audits e.g. ISO, QS, TS and Automotive in both responder and auditor roles with our suppliers. Never received a ‘major finding’ in any of my departments.

oDeveloped strategic quality, productivity and cost goals for engineering and direct labor operations through use of LEAN and Six Sigma methodologies.

Staff Process Engineer (West Jordon, Utah)

Defined and sustained new process recipes and standardization for semiconductor wafer fab:

oFurnace area (atmospheric drive, oxidation, anneal, alloy, POCl3)

oChemical Vapor Deposition using both LPCVD (Polysilicon, Silicon Nitride) and APCVD films (BPSG and Undoped SiO2 films)

oIon Implantation (medium and high current)

oSputter Metallization, Wet cleans (Pre-metal strip, RCA, Piranha), Plasma Ash

Administrated and taught course in statistical fundamentals and a Design of Experiments course for the entire process and product engineering organization using a real time automated proprietary Statistical Process Control (RSPC) system, SAS and BBN cornerstone software.

Recognized as the driving force behind multiple continuous improvement efforts by deploying Business Intelligence Systems for Work In Process control:

oReduced product risk due to human error through implementing process recipe structuring within the MES for automated recipe downloading.

oHighly customized data collection scheme for feed forward / recipe control protecting 60% of the production cycle from scrap.

oTeam efforts to develop and deploy a high reliability distributed Advanced Equipment Control network for real time equipment control, data capture and analysis tools for process control improvement on over 100 individual wafer fab tools.


Bachelor of Arts, Concordia College, St. Paul, MN

Major: Education, Minor: Mathematics (cum laude)

Graduate course work incomplete: California State Long Beach – Masters in Engineering

Other Accomplishments:

Patents: Thirteen Issued (6957113, 6957114, 6959225, 6961634, 7043319, 7065424, 7184850, 7373211, 7725207, 7784423, 7826915, 8417367, 9235413)

International paper presentation: APC/AEC conference Dresden, Germany 2001, International Sematech, Austin 2008

USA paper presentations: APC/AEC conference Salt Lake City, Utah 2003; Brooks Automation Conference, Arizona 2004 & 2005;

George Logsdon 208-***-****

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