Engineer Software

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*** ******** **** ***, *** Gatos, CA ***** sharshasunet@Solomon gmail.com cell: Harsha 408-***-**** Executive Summary:

Ø 25+ years of professional software developer & architect experience working in the areas of high-performance computing

& communications (parallel/distributed systems, embedded systems, financial modelling systems) leveraging AI and Machine Learning algorithms for stock exchanges, FinTech’s and various industry verticals. Ø Demonstrated experience in evangelizing architectures from conception to execution and highly analytical problem-solving skills with strong understanding of implementation of data communications and computing using x86 / FPGA hardware and software.

Ø Expert at creating technical breakthroughs, bringing together management and technical teams and introducing innovative products to solve business problems.

Ø Demonstrated experience in working with VC’s, M&A and Integration experts and has robust strategic, methodology and tactical operation experience.

Professional Preparation/Education

B.S, Nagarjuna University, India. ECE 1988

MS, Illinois Institute of Technology, USA. Computer Science., Mathematics, & Quant. Finance 2011 Ph.D, Stevens Institute of Technology, USA. Computer Science., Mathematics, & Quant. Finance 2019 Advisor: Prof. & Dr. Khaldoun Khashanah, Financial Engineering Dept., Stevens Institute of Technology.

(Thesis: Relativity Computing - Distributed Automata, Compute-Communicate Continuum Beyond Church-Turing Barrier). Technical Skills and Core Competencies

Tools: • x86: C/C++ - Multi-core Prog, UNIX Kernel/Matlab/Python, ARM, RTOS,

• FPGA: Verilog - Front-End RTL Design, Soft Processors/SoC, Embedded systems. Networks/HPEC-Low

Latency:

• Deeply pipelined systolic array-based hardware architectures to maximize computational/ communications throughput using TCP/IP, FSA, MSMI protocols.

• Ultra-High-Speed back-bone solutions for trading firms and network connectivity of stock exchanges using Low Latency technologies and HPC.

Financial Technologies: • Derivatives/Equities/FX/Commodities, ERM, HFT-High Performance Trading, SORs, FIX, order execution, order management, Matching Engines/Algorithms. Quantitative: • Financial Modeling/Mathematics/Statistical techniques, Numerical Methods, Complex Monte Carlo simulation, PDE’s and Fourier analysis.

Professional Projects & Achievements

Ø Architected & developed in C++/Multicore a new high-speed communications protocol ‘Flow State Aware’ (FSA) along with Dr. Larry Roberts (Inventor of the Internet) on x86 architecture the protocol is faster than existing 45yr. old TCP/IP. Ø Proposed and developed a new technology “Relativity Computing” to develop a new computer model to perform beyond Church-Turing’s model and achieve supercomputing.

Ø Designed and developed a new algorithm for automation of parallelizing sequentially written code on multi-core to achieve supercomputing. This is an age-old problem in Von-Neuman computer model, parallelizing a program on thousands of cores was highly impossible.

Ø Proposed and designed Compute-Communicate Continuum Technology (CCC) which merges both computing and communications model into one computer model.

Ø Proposed and developed High speed communications protocol ‘Metal Shared Memory Interconnects’ Technology which can make any two CCC based computer models to communicate. Ø Proposed and developed Distributed Automata & Fabric as System Technology to achieve supercomputing through distributed computing on geographically distributed CCC computers. Ø Designed and developed New Geometric Modelling algorithms based on NURBS 1.) Unfold-Refold Geometric Modeler,

2.) Hidden-Line Removal Algorithm,

3.) Complex Geometric Shapes/Equipment Modeling,

4.) Centralized Clash Detection Algorithm and Management System. Ø Excellence award 2006 (Computervision & PTC Corporation) 2

Ø Publications: 12, Patents: 24 (Issued/Pending/Under Disclosure Professional Experience

FSA Technologies, Santa Clara, CA Aug.2015 – Till Date Principal Software Architect

• Architected, designed and developed in low latency C/C++/Multicore a new High-Speed Communications protocol along with the inventor of the internet Dr. Larry Roberts.

• The new protocol developed is FSA protocol i.e. (Flow State Aware) which replaces TCP/IP in due course of time. Successfully released the protocol and the new protocol’s software truly makes networks intelligent and greatly increase packet network throughput and speed while decreasing response time.

• Conducted proof of concepts on the protocol for major bank in wall street to enhance Cross Asset Trading to be done across the multiple exchanges, order matching engine and smart order routers.

• The software resides on two standard X86 servers called FSA Gateways, to be deployed on one or more high speed (1 Gbps, 10 Gbps) network trunks. Result: New levels of utilization/throughput lower latency, less congestion and better network efficiency and effectively increases Network Capacity by 2-3X.

• Designed and architected the next version of the protocol on Vertex -7 FPGA’s by creating 64 cores and with NoC connecting them with memory.

• Strongly involved with sales and marketing of product. Produced technical and marketing documentation. FissionStream Technologies, Sunnyvale, CA Nov. 2012 – Aug. 2015 Sr. Embedded Developer / Architect

• Designed and Developed Systolic Pipelines in C/C++a next generation High Performance Computing & Communications technologies for financial markets. Turing scheme works well in one location/market but to work in multiple locations/markets requires other kinds of computation models with a different attitude towards the space-time patterns.

• To make Turing Scheme truly universal developed technology which can design and develop a new computer model i.e. a Distributed Automata wherein multiple computing/communications-nodes work in unison at geographically distributed locations providing distributed computing.

• Developed architecture for “Compute-Communicate Continuum Technology - CCCT”, to build new breed of computers to achieve distributed computing to perform beyond Turing’s machine.

• Designed and developed a new high-speed communications protocol, “Metal Shared Memory Interconnects”, based on

“High Performance Embedded Computing” HPEC technology fully on FPGA’s.

• Proposed systems design and architecture for low latency network connectivity to link Toronto Stock Exchange (TMX) and Hong Kong Stock Exchange (HKEX) and their jitney traders in NYC (Morgan Stanley) and Shanghai, China (Shanghai Stock Exchange).

• Strongly involved with sales and marketing of product. Produced technical and marketing documentation.

• FissionStream was acquired by Sviral, Inc. CA, in July 2015 Hewlett-Packard, New York, NY May 2010 – Sep 2012

Sr. Architect/ Sr. Embedded Engineer, Hewlett-Packard, New York, NY

• Lead Low-Latency Labs & developed in C++ low latency computing/communications models for trading firms and investment banks to systematically minimize latency due to communication networks between trading platforms and the trading venues.

• Developed HPC solutions to process Market Data, pricing and risk minimization algorithms for investment banks.

• For Key Bank: Developed a high frequency equities research infrastructure using Matlab and Perl and then on C/C++.

• For Deutsche Bank: Provided low latency architectural solution for next generation Fix engine which connects no. of clients/exchanges.

• For Hong Kong Exchange: Provided consultancy for Low Latency Matching Engine and Back-Bone Infrastructure. HKEX was implementing (C++) next generation matching engine (QoS based).

• For Korean Stock Exchange: Designed and Provided a new HPC based solution to protect high speed networks with TCP/IP Traffic against malicious activities capable of doing deep packet inspection at high speeds. Illinois Institute of Technology, Chicago, IL Sep. 2008 – May 2010 Research Assistant

• Worked on an industry research project with Dr. Ben Van Vliet and developed quantitative models for Term Structure analysis and minimized computational effort in various graphs in 3D.

• The quantitative models developed in C++ which include Financial Modelling, Quantitative Analysis, Trading Strategies, Derivatives Pricing and Risk Management.

Derivatives Technologies Jul. 2007 – Jul. 2008

Director Product Development & Sr. Developer

• Designed and developed in C++ automated trading platform to trade equities by connecting to the Bombay Stock Exchange.

• The platform processes Market Data & predicts the price of the equities and determines the vol. of the trades ahead of time.

• Other projects include protocol converters for sub-station automation to control RTU’s using SCADA. 3

Computervision/Parametric Technology Corporation, Boston, MA Jun 1996 – Jul 2007 Sr. Technical Consultant

• Designed and developed in C/C++and released seven revisions of the Geometric Modelling Engine in the product CADDS5.

• Lead globally dispersed R&D teams and developed no. of “NURBS Geometric Modeling Algorithms”, worked in designing of A380 jumbo, F35 JSF fighter jets and provided no. of surface/solid modelling algorithms.

• Some of the major algorithms include Unfold-Refold Geometric Modeler, Hidden-Line Removal Algorithm, Complex Geometric Shapes/Equipment Modeling, Centralized Clash Detection Algorithm and Management System.

• Provided industrial solutions to Aerospace (Airbus, Rolls Royce, NASA-JPL), Ship Building (DCN, France) and Automobile (Volvo, Benz) Industries.

Kasbah Systems Software/Messer Gresham 08/1991 – 05/1995 Sr. Systems Engineer

• Developed driver software for controlling gas cutting machines to cut steel plates of thickness 1-12’’ thickness.

• Developed O.R projects mainly for least cost feed formulation for poultry/cattle/aqua feed manufacturing

• Designed developed CAD 2D nesting s/w PROCUT for sheet metal optimization for manufacturing industries.

• Developed real-time Fabric Fault Monitoring System to monitor the quality of the cloth and there by frequency of faults in looms can be corrected to give quality fabric.

Faculties India Ltd. Bangalore, India 06/1990 – 07/1991 Software Engineer

• Developed software modules for Computerization of organizations such as English Electricals, Mandya Sugar Factory etc.

• Developed Algorithmic work for database system modules involving various mathematical analytics reporting. Indian Institute of Science 06/1988 – 05/1990

Research Assistant

• Developed Libraries of Digital Image Processing routines for improving images both in Spatial, Frequency & Histogram domain techniques, used to process any image like Fingerprints, Space pictures, etc. Selected Patents & Pending Patents

• US9501449 - Method, apparatus, and computer-readable medium for parallelization of a computer program on a plurality of computing cores. – Issued.

• US9652435 – Parallel Computing on Localized multi-core sets (Within a Data Center)- Method, apparatus, and computer-readable medium for parallelization of a computer program on a plurality of computing cores. – Issued.

• US9760530 – Parallel Computing on Distributed multi-core sets -More claims on Method, apparatus, and computer-readable medium for parallelization of a computer program on a plurality of computing cores. – Issued.

• US9760531 – Automation of parallelization of a program on heterogenic cores (x86/FPGA cores) Method, apparatus, and computer-readable medium for parallelization of a computer program on a plurality of computing cores. – Issued.

• US10019410–Parallelization of a program on networks of multi-core (Xeon & FPGA cores) Method, apparatus, and computer- readable medium for parallelization of a computer program on a plurality of computing cores. – Issued.

• US62293154 - Compute-Communicate Continuum Technology (Parts of Ph.D. Thesis) – Issued.

• US61889011 – High Frequency Data-Streaming for WAN/internet using Dynamic Systolic Arrays on Massively dense FPGA cores using metal-shared memory interconnects. – Patent Pending.

• (20+ Patents issued/ pending/ under disclosure. And no. of publications in leading international journals.) Selected Publications – Journal Articles

• Solomon Harsha, Khaldoun Khashanah: “Relativity Computing on Distributed Automata for Financial Engineering Models and Trading", JOURNAL OF IEEE TRANS. ON COMPUTERS CLASS FILES, MANUSCRIPT SUBMITTED ON 5/4/2018.

(Working Paper)

• Solomon Harsha, Khaldoun Khashanah: "Compute-Communicate Continuum Technology", International Journal of Advance Computational Engineering and Networking (IJACEN), Volume-6, Issue-7, pp 1-24,2018.

• Solomon Harsha, Khaldoun Khashanah: "Metal Shared Memory Interconnects-MSMI", International Journal of Industrial Electronics and Electrical Engineering, Volume-6, Issue-7, pp 1-15,2018.

• Solomon Harsha, Khaldoun Khashanah: “Taming the Parallel Programing on Multi-Core", International Journal of Advance Computational Engineering and Networking (IJACEN), Volume-6, Issue-8, pp 1-12,2018.

• Solomon Harsha, Khaldoun Khashanah: "High Frequency Trading System on Chip", International Journal of Industrial Electronics and Electrical Engineering, Volume-6, Issue-8, pp 1-8,2018.

• Solomon Harsha, Khaldoun Khashanah: “Parallelizing Sequentially written Code on Multi-Core", International Journal of Advance Computational Engineering and Networking (IJACEN), Volume-6, Issue-9, pp 1-16,2018. Professional Qualifications and Memberships

Member – IEEE, Institute of Electrical and Electronics Engineers - # 93676871 Member – GARP, Global Association of Risk Professionals -# 411105

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