Software Engineering R D

Manidip Sengupta

Professional Summary

Experienced engineer with good communication, technical and analytical skills seeking a hands-on leadership role in the field of Software engineering, Statistical Analyses, Algorithms and Numerical Methodologies using modern technologies and infrastructure. Knowledgeable in Project Coordination, Cloud infrastructure, Object Oriented Architecture, Continuous Integration/Deployment mechanisms and Agile methodologies in a collaborative teamwork. Specially interested in development of EDA tools used in R&D, building interfaces for Analog and Digital simulation frameworks.

Skills

Framework (backend) development with cloud resources, web servers and Servlet engines

Analysis of variety of test data; Determination of actionables from dashboards

Compliant software architecture with specifications in business requirements

Development and automation with Typescript, Python, Java and Unix shells

Project documentation with Confluence and progress tracking with Jira

Variety of SQL (MySQL, Oracle, PostGre) and NoSQL (MongoDB, DynamoDB) databases

Experience

Xpanse, Inc.

Seattle, WA

Feb 2022 – May 2022

Platform Integration Architect

Translation of business requirements to a system architecture on AWS environment. Supported Java and Typescript development, deployed as Lambdas in Step Functions. Published resource planning, end points and validators for Platform Integration services in the Mortgage Industry.

a.Focused on building a platform to connect banking and mortgaging to expedite the process of mortgaging a house.

b.Worked with Datadog and Cloud Watch to monitor expenses.

c.Created dashboards on Datadog to monitor performance and directly increased efficiency while decreasing costs as a result.

d.Facilitated the migration from Java with AWS to Typescript. DynamoDB was the database and NoSQL was the language in this environment.

Edelman Financial Engines

Santa Clara, CA

May 2019 – Feb 2022

Release Manager

Coordination with the application, development, testing and deployment teams to validate new releases. Work in an Agile system with a 6-member team in a bi-weekly sprint. Jira for progress tracking and documentation on confluence/gitlab.

e.In charge of repairing existing Jython systems in Python or migrating them to Java

Sr. Engineer, Fiduciary

Translation of Financial Specification and requirements to the Architecture and design of functional software, followed by the implementation and deployment. Collaboration with Research team and Java development in the Eclipse environment for CI/CD pipeline in AWS infrastructure. Gradle based integration with deployment in cloud environments with Jenkins.

Apple, Inc.

Cupertino, CA

June 2013 – May 2019

1.Team lead, Automation Infrastructure

Led a 3-person team to design and implement the hardware requirement for testing the microchips currently under development at Apple, using low level communication prototypes and mechanisms to install and test various design specs of the hardware

a.Used Python for charting and data processing with electronic structures

b.Leveraged CICD pipelines for reviewing results of developer testing’s and certifying if the results were ready for google testing

c.Hands on with Python to create dashboards and user interfaces for flashpoints on electronic devices.

2.Architect, Continuous and Distributed Aging Infrastructure

Design, development, implementation and productization of Aging Infrastructure in place for the current microchip undergoing design and manufacturing for the upcoming Apple products.

3.Architect, Nightly LVcc and Shmoo Analysis systems

Automation of nightly runs after development and productization of proprietary software within the Apple ecosystem.

Patent and Publications

●Worst case performance modeling of analog circuits: Patent based on derivation and application of statistical corner models of N/P devices and associated BSIM models, October 2000.

●Application-specific worst case corners using response surfaces and statistical models: Recipient of Best paper award at ISQED in October 2005, published later in Journal

●On-wafer RF Figure-of-Merit Circuit Block Design for Technology Development, Process Control and PDK Validation: Conference paper published in April 2007

●Test structures and analysis techniques for estimation of the impact of layout on MOSFET performance and variability: Conference paper presented in April 2004

Education

Ph.D.: Electrical Engineering,

oTexas A&M University, College Station, TX

M.S.: Electrical Engineering,

oTexas A&M University, College Station, TX

B.E.E.: Electrical Engineering,

oJadavpur University, India

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