Aner Resume **** Draft (Sr. Principal - Analog, Power, Mix.-Sig, HW, Sys) 2/12/2023
Aner Tennen Sr. Principal, Hardware/System – Analog/Power/Mix.-Sig./RFI/EMI
Howell, NJ 07728 Cell: 408-***-****, Home: 732-***-**** *******@*********.***
LinkedIn Profile: https://www.linkedin.com/in/aner-tennen-2a45735/
PROFESSIONAL PROFILE
Extensive development experience in Analog, Power, Mix-Sig, RFI/EMI, RF, Semiconductor, Measurements/Testing & Biomedical.
Strengths: System Architecture, development, modeling, simulations, and finding solutions to highly complicated problems.
Skilled in performing and leading R&D and architecture of hardware/systems/ICs in diverse electronic products, systems and equipment, for a wide range of market segments and applications for the above industries segments.
Experienced in, conceptualization, definition, characterization, systems analysis, mathematical modeling and simulation.
Skilled in analysis, modeling design, simulations, schematic-capture, components selection, layout & routing, prototyping, debugging, integration, testing and regulatory compliance.
CORE COMPETENCIES
R&D – HW/Systems/Products – Manage/Project-Plan/Architecture Feasibility-Study - Define/Analysis/Block/Spec./System-Sym. PDR/CDR System & Circuit Design/Simulation/Schematic/PCB Lab Debug/Integrate/Eval./Testing Problem-Solving/Rout-Cause-Analysis /Customer-Support/Failure-Analysis. Expertise – Analog/Power/RFI-EMI. & Mixed-Sig/Hi-Speed/PCB/Biomed Ultra-Low-Noise AFE design in RF/Telcom/Imaging/Biomed, including: – LNA/Diff./Inst.-Amp, CM/DM Sig/RFI/EMI Passive/Active Filters, PLLs, Mixers, Optimal/Adaptive Detectors, AGC Control – Adaptive/Nonlinear/Optimal Noise Generators & Controlled-Oscillators Detectors, AGC Analog/Dig.-Wired/Wireless High-Speed Modems Power-Electronics - Lin./Switched/PSU/AC-DC/Converters/Inverters/PFC. Topologies: Buck/Boost/ Flyback/LLC., Op.-Mod: CCM/DCM/BCM. Power-Stages: Class-D/E/ϕ2 – Single-Tr./Push-Pull/Half/Full-Bridge/ZVS/ZCS Control: V/I-Avg/Peak/RMS, Lin/Non-Lin./Hysteretic/Bode/Stability-PM/GM/Comp.-Lead/Lag Magnetics – Inductors/xFMR, Modeling: Losses: Core-Hysteresis (Jiles-Atherton) / Eddy (Steinmetz), Wire-DCR/Skin/Prox., Parasitic: Cap.-Winding/Inter, Leak.-Ind. Thermodynamics.
IoT (Self-owned, see below) – Consulted/Contracted Projects
IoT – 1.2kW 1MHz Class-E/ϕ2 AC-DC PFC Converter 3/2021 – Present
A non-existent, highly-inventive, new topology/architecture of a high-power AC-DC Power-Supply is first time developed. It is based on multi-disciplinary accumulated knowledge & experience in PE/RFI-EMI/Analog/Modulations that are utilized to develop a highly cost-effective, small-size & high-efficiency new product to the AC-DC Power-Supplies market. Due to utilizing a high-power RF switched-mode resonant Power-Stage, this new AC-DC Power-Supply has many advantages over standard switched-mode power-supplies, like: Inherent PFC, Non-PWM Fixed-Freq. Low RFI/EMI, Small-size components, very high efficiency, GND-Referenced single-stage, narrow-band EMI switching noise, Wideband & Fast-Tran.
Utility/Solar Energy Storage 1/2020 – 3/2021
In a 10kW, Wide-Voltage-Range Hi-V DC (200V-1kV) Energy Storage System, I was responsible for the 300W System Power Board, which was fed from HVDC Power-BUS & generated Multiple Insolated SMPSs DC Voltages. In addition to leading RFI-EMI Testing/Certify, I was responsible for:
Electronic-circuit analysis of all modules/ICs, Root-Cause/Failure Analyses & Lab testing of previous gen.
Participated in the redesign of above Power-Board, some of its Switched-Mode Power-Supplies & introduced new hardware improvements.
Selected all new components in the new system & participated in Schematic-Capture & Layout of all new changes.
FreeWire - High-Power EV-Chargers: Mobile/Ultrafast 1/2019 – 12/2019 Sr. Principal Electronic Eng.
Mobile L2 DC EV-Charger (80kWh/11kW) & Ultrafast L3 DC EV-Charger (160kWh/120kW). Both have: (up-to 800V) HV-DC Batteries, AC-DC Inverters & DC-DC (Buck) Converter (Mobile had also Single-Phase, Standard, DC-AC Inverter).
I had several Roles & Responsibilities and led the following projects:
Full technical responsibility for all High-Power Electronics (Converters/Inverters/SMPSs/Hi-V/I AC/DC Contactors) of Ultrafast-Charger.
It included: Searched & purchased Converters/Inverters. Tested both on bench & in Charger to verify Spec./Performance/EMI.
Provided technical expertise & support by designing & implementing Testing Setups. Perform/documented all required testing.
Solved problems & failures, performed Root-Cause-Analysis, debugged or replaced them & tested to verified their performance.
Responsible for R&D of all future Power/Electronics new technologies/products. Suggested & designed the following projects:
oElectronic System that allowed Synchronous connecting 3 Mobile-Chargers as a High-Power 3-Phase AC System (120kWh/33kW).
oA too-high random Inrush-Current problem at Mobile-Charger AC input, which shut-down the Mobile charger when connecting input AC Power. Designed an elegant, small & cost/effective AC-Input-Synchronized Active Soft-Start Power Protection.
Responsible for prepare/pass EMI Conducted/Radiated Emissions Certification. Developed inventive miniature EMI DC LPF for Fast EV Charger.
FO Engineering – High-Power Pump’s Motor & Control for Defense 7/2018 – 12/2018 Contractor
10kW Pump BLDC-Motor in HVAC Airborne System – 3-Phase-Drive/Control for Military Avionics. Upgraded a much lower-power previous gen.
to the above system, based on new military requirements & a few MIL Standards. In framework of this project, performed diverse technical activities:
Redesigned Power-Electronics & EMI Filter of this system: Mathematical Analysis/Modeling, Electronic-Design, Pspice-Simulations, Components Selection, Schematic Capture, PCB Layout, Stress-Analysis & Components Derating, Lab. Testing.
Designed Thermal-Mechanics of new system. Due to too high-power dissipation, utilized a Central Water-Cooling System of all avionics by waterproof PCB Conformal Coating and immersing the Electronic Board inside the cooling-water of this HVAC system.
KLA Tencor - Multi-E-Beam Imaging System 8/2017 – 2/2018 Consultant
Prototype suffered from a wideband-switching-noise of diverse “Hi-V-Biased Floating Switched Supplies” contaminating imaging signal that drove an R&D Project for development of a new technology for “Quiet Power Feed”, in which I developed a Hi-Power (0.5kW) of a Pure Sine-Wave, Large-Swing @ Hi-Freq. (0.15kVp/0.1MHz), transformed thru Hi-V-Isolated (up-to 10kV) Transformer, used as an Insulated Hi-V-Biased Quiet Power-Bus that fed divers Isolated & Floating Power-Supplies (FPS). Each such FPS contained, also an innovative “Adaptive-Noise Current Canceller” that provided clean & quiet DC-Power that solved this tough noise-problem. Developed diverse SMPs & Sync. Power Rectifiers w/ Hi-Efficiencies.
In addition, Invented, designed, built & tested an Isolation Power Transformer, winded on Toroidal Ferrite-Core, between Noisy GND to Quiet GND in Clean Room, w/ 2pF Inter-Winding Capacitance, to guarantee maximal attenuation of Wideband Switching-Noise between Ground.
Aner Resume 2023 Draft (Sr. Principal - Analog, Power, Mix.-Sig, HW, Sys) 2/12/2023
Autonomous Driving 1/2017 – 4/2017
Developed Power & Safety Management Modules in a Car Safety Computer for Autonomy Driving.
System included: Multi-fast DSPs/CPUs/MCUs/ Memories, multi hi-speed serial COM-busses/networking/analog-sensors (V/I/T).
Board contained multi-rails mixed-signal ICs. Responsible for: power-protections/safety-interface w/ Hazardous/Noisy Hi-V car battery, power-distribution to multi-rails/ICs, and power-up/down sequence.
Design included: multi-SMPSs/ LDO-PMIC, few Lo-V/Hi-I SMPSs, power/safety management MCU – managed PMIC/SMPSs/Relays,
performed an orderly safe power-up/down sequence, & measured V/I/T. Designed to mitigate Safety/RFI/EMI standards.
Utility Power Products 6/2016 – 11/2016
Transfer of a new pre-production product of Overcurrent Fault Protector for very Hi-Power (1kA, tens of MW) Utilities’ Mid. Voltage Powerlines, from a finished development-stage to a full production-ready product.
Product included several SMPSs (Push-Pull for Isolated USB, 5-50V Boost, PoE-12V Buck, 12-3.3V Buck, & Hi-V to 12V Buck).
Performed: lab-testing/diverse-analyses/simulations to verify performance (worst-case/error-budget/ sensitivities/Monte-Carlo/ stability, line/load regulations/step-response). Identified: design-errors, high-risks/sensitivities, and performance issues.
Redesigned, found better components, retested to verify modifications, and prepared schematic/BOM changes.
Actelis Networks Fremont, CA 1/2012 – 7/2012 Consultant/Contractor
Was hired as a world Expert to solve their “ADSL over POTS Reach/Rate Extender” extremely complicated problem, in their 1st gen. proto.
Re-Architected/Designed 2nd gen. prod., which included, Analog: Full ADSL CO/CPE Rx/Tx Chains + Hi-order Lo/Band/Hi-Pass-Filters & Line-Drivers, POTS Lo/Hi-Pass-Filters, a Floating “Power-Supp. – POTS Noise Isolator” (my invention) Current Sources/Limiters, Line-Voltage Ring-Rect./Detect & Prot. Comparators. Power: Burst-Mode Buck SMPS & Regulators. Digital & 2x µ-Controllers. Developed 2 Buck alternatives
Performed Hi-Level system modeling, analysis, simulation, prototyping, debugging, testing, schematic-capture, layout, components ordering.
PROFESSIONAL EXPERIENCE
IoT (Self-Owned) Sunnyvale, CA 1/2012 - Present, Freehold, NJ
Extensive Power-Electronic Dev. & Prod.: Buck/Boost/Dual-Phase/Flyback/Charge-Pump/LLC/Class-E/PoE/POL/PFC/Motor-Cont./1w-10kW
Developed two products: a) Wired/Wireless Smart-Home Controller-systems: a) Sprinkler, b) Wireless Smart-Home HVAC. Both included: WiFi, µ-Controller, solid-state relays, off-line SMPS and I/Os. Each system has many small, low-priced wired/wireless remote-controlled actuators/sensors End-Units (EU).
Sprinkler Controller includes: Power-Line-Communication Modem, Hi-V DC-DC Converter, Isolated DC-AC Inverter that fed many EUs, and pass monitoring, command & control data between controller & EUs. EU produced 24Vac to power sprinklers valves. Concept was highly modular.
Wireless HVAC Controller – Multi Remote-Controlled Smart Wireless Ultra-Low-Power Temp. Sensors w/auto-wakeup & adaptive auto-range (HW/SW algorithm). Each Wireless Temp. Sensor was fed from cheap 2x1.5V AAA batt., w/Hi-Eff. Boost Charge-Pump Hysteresis-Controlled that powers w/smart HW/SW algorithm, lifetime > 18 months, & transmission range > 100m.
Apple, Inc. Cupertino, CA 10/2014 - 12/2015 Single Contributor, Principal, HW/System/IC Architect
Developed a low-cost portable R&D Impedance Analyzer for studying Corrosion Impact on Fine Pitch Connectors.
Led R&D of next generation core technologies in Wireless Power Charging (WPC), combined with advanced digital COM.
oDevice to charger COM based on Qi Wireless Power Charging standard; where the device modulates its own magnetic resonator’s reflected impedance that appears on the charger side as ASK. A simple passive rectifier was replaced with a sensitive and accurate active one, with which performance dramatically improved.
oFeasibility-study on Advanced RF Wireless Power Charger, based on RF magnetic induction (A4WP Standard) at 6.78MHz, and a high efficiency RF PAs (Class-E/F/Φ2). Channel performance of magnetically coupled Tx/Rx Resonators were simulated and analyzed. Resonators were redesigned and optimized. Performance significantly improved.
Developed an innovative Dying-Gasp Boost-Buck SMPS. Usually, Boost trickle-charges a Hi-V cap until battery is dying. When an urgent application suddenly requires an additional short-term power-boost, this Boost turns into a Buck, & powers the system.
Led improvements of Conducted RF Modem IC Transceiver for significant Tx-Power-reduction and rate-increase.
SunEdison Belmont, CA 5/2011 - 5/2014 Sr. HW/System – R&D, Integration
Architected & designed a low-cost Wireless-Controlled Solar Gateway for Residential/Small-Business. Gateway included: Power-Line COM (PLC) for command/control of solar-modules w/µ-Inverters, wireless GPRS Modem for data-transfer to national data-center, wireless Zig-Bee for on-site data COM w/other devices, Multi-Phase/Standards Revenue-Grade 50kW AC Power-Meter that measures AC parameters of power harvested by the solar fleet, AC/DC Power management, µ-Controller managed product/ data-traffic. Developed all Analog/Power/COM, which
included the full 50kW AC Power-Meter, Power-Liner COM, & Multi-Voltages Off-Line Flyback Switched-Mode Supply that fed a few regulators.
Led all Regulatory aspects of this product, from concept to a fully working product. HW-integration/testing-phase was short & it worked well first-time w/minor modifications.
Developed an accurate/low-cost DC I/V measurement module, in a mass-production Solar DC Optimizer, based on a smart HW/SW Algorithm that was invented to improve cost/performance. It achieved much better cost/performance than expected.
Accountable for all aspects of PLC, including: developing testing setups & procedures for Lab-Eval./Charact. COM performance between PLC Modems. Developed a complete Lab Infrastructure for full functional evaluation & testing of a complete grid-tied µ-inverters fleet solar system. Invented, developed, tested & patented a powerful/low-cost Power-Line Isolation Filter that improved COM performance & turned the noisy-gridline into a quiet-private-line for $6 instead of $600. This “Power & COM Testing Lab Infrastructure” was so useful in Eval./Test of Operation/COM, that it was also used for customer demo.
EnPhase Energy Petaluma, CA 3/2010 - 1/2011 Sr. HW/IC Chipset Architect/PLC
Led Architecture/Spec. of System-on-Silicon 2 CMOS Chipset, the core of a µ-Inverter w/Integrated PLC Modem, in a solar product. Main IC contains: system brain (>1M gate: glue-logic/MCU), sensing, monitoring (temp/current-sensors, ultra-low offset Inst.-Amps, MUXs, ADCs), command & control (I/Os, SPI, hi-speed ser. inter-chip-link IFC over Hi-V barrier thru Cap- coupling, PLC Modem w/advanced AFE). 2nd ASIC – Hi-V CMOS, residing on Hi-V domain that measured, monitored commanded & controlled functionalities thru that Hi-V Insulated digital serial hi-speed interfaces.
Aner Resume 2023 V-0.2 (Sr. Principal - Analog, Power, Mix.-Sig, HW, Sys) - Draft 3/12/2023
Hi-V CMOS Chip had a self-powering AC-DC Converter. Both HV/LV CMOS Chip had PEMIC which managed & controlled multiple DC/DC SMPSs & Power Sequencing. Chipset architecture saved BOM cost, increased company margin by multi-million dollars in savings, and reduced BOM/area/power, in addition to improving functionality and performances.
Designed all Switched-Mode Buck Regulated Power Supplies for this Chipset.
Accountable for Power-Line Communication Modem – planned/tested existed PLC & architected/spec.ed/designed a new AFE for COM improvement. Company’s partner for collaboration – STM examined the PLC design, indicating they were very impressed.
SVTI San Jose, CA 4/2009 – 2/2010 Sr. RF-IC/HW – System-Architect/IC-Design
Led a small group of IC designers in the development of a Bluetooth 802.11 EDR 2.0 RFIC Receiver w/ IBM 7RF CMOS 0.18µm
process @ 2.5GHz w/ Integrated Inductors. Project included: 1) On-Chip: Diff. LNA w/ Integrated LC BPF @ 2.4GHz, Diff. Single-
Balanced Multiplying Mixer, Low Phase-Noise Freq. Synthesizer w/ Fully Diff. Freq. & Mag. Controlled/Programed VCO, 1st diff. IF Amp w/ Integrated LC BPF, Band-Gap Ref & Biassing Circuitry, Timing Circuitry, Control/Programing Registers. 2) Off Chip:
2nd Rx Mixer, 2nd Local Oscillator, 2nd Rx IF Amp/BPF, AGC, Quadrature PSK DeMod (w/ Carrier Recovery), Timing Recovery, Digital DQPSK, SMPS & Regulators. My responsibilities included, but were not limited to:
System Architecture & Spec., detailed block diagram, full detailed block spec., literature survey of optimal circuit topology of each block, analysis, modeling & simulation of recommended circuits/topologies, based on IBM 7RF CMOS Transistors/Inductors models best strategies. Divided block design & work-load based on design engineers experience & knowledge. Conducted weekly meeting
& consulted/helped each/anyone desired my assistance. Tracked time-table, progress & raised Red-Flags to Management.
Simulation/modeling tools, used 1) System-Level: MathCad & MATLAB, 2) Circuit/IC-Level: Cadence Spectre, COSMOS, Pspice.
Project included: Feasibility Study (myself), System/Block Spec. (myself), IC Design/Simulation (all), Block Integration (all), Full IC Simulation & Functionality/Spec. Verification, Floor Plan & Pinout, Layout + LVS, FAB & Packaging, Board Design/Simulation
Components-Selections/Layout/Fab/Bring-Up, Lab-Integration, Block Testing & Measurements.
Ikanos Communications Fremont, CA 7/2006 - 10/2008 Principal, Analog-System/HW
Supported IC Analog-Front-Ends definition/architecture, performed system/circuit analyses, design, and simulations critical to accelerating time to market, delivering best-in-class solutions for optimal cost/performance.
Supported and mentored engineers, technicians, and layout specialists. Facilitated communication between the system and IC design groups. Created and executed testing and characterization plans.
Developed technical reports and documentation. Interfaced frequently with vendors. Designed and implemented numerous new topologies and circuits. Designed and tested bring-up boards to characterize new ICs.
Architected/designed ICs’ AFEs that solidified company competitive position, and helped win Tier-1 customers.
Revitalized customer relationships by resolving & addressing fundamental field problem, by creating a circuit to provide performance compensation for a nonstandard lightning protection module that severely degraded modem performance. Enabled customer to recover lost performance, thus won back the customer account.
Found & solved a performance problem during final field testing, caused by a previous third-party vendor, saving the account.
Developed a complex Adaptive Hybrid and Line Interface for A/VDSL Modem block for a major Tier-1 customer, using in-depth analyses and simulations to ensure compliance with conflicting requirements and specifications, creating a cost-effective, highly responsive solution. Design was superior to others in the market, helping company retain worldwide leadership.
Guided Telcos companies in their COT multi-Level Voltage Power Drive from 48V power feed through a Middle-Voltage Central Muli-Phase Hi-Power/Eff. Buck Inverter SMPS, down to a Low-Voltage PoL SMPS @ COT DSLAM Board. Developed & tested CPE Switched-Mode Regulators for Reference design & helped customer debug problems w/ problematic their CPE noisy SMPS Regulators & RFI/EMI issues.
Conexant Red Bank, New Jersey 5/1999 - 5/2006 Manager R&D, Analog – System/Hardware/ICs
Provided technical expertise to 2 key projects: 1) Lo-Power/Cost, Hi-Effic. Class-D Line Driver IC for ADSL2+, 2) Miniature Low-Power/Cost Programmable Active POTS Filter (APF) for A/VDSL. Identified market-needs for these solutions, conceptualized them, and delivered a compelling presentation to engineering, marketing, and management teams to secure buy-in.
Delivered a global breakthrough by developing a novel Non-Linear Line-Driver architecture that met stringent and conflicting ADSL2 requirements for wideband, low distortions, high efficiency and low power on the Central-Office side. This LD solved a fundamental /difficult problem of heat on the very high-density boards of CO-DSLAM, due to its hi-efficiency increase.
Wrote a patent/paper presented at the annual International Solid State Circuits Conference (ISSCC) for the above APF project.
Led joint developments of CO ADSL+POTS systems with 2 key vendors - Agere Systems and Legerity - creating a comprehensive and complete solution to integrate Globespan ADSL system with POTS systems of those vendors. Performed extensive measurement, testing, data analysis, and developed recommendations. Managed face-to-face and phone-conferences to track and drive project progress. Actively participated in all HW designs/tests conferences calls and design reviews.
These combined ADSL+POTS CO DSLAMs benefited twice both companies & successfully used for Ref.-Designs & Demos.
Guided Telcos companies in their COT multi-Level Voltage Power Drive from 48V power feed through a Middle-Voltage Central Muli-Phase Hi-Power/Eff. Buck Inverter SMPS, down to a Low-Voltage PoL SMPS @ COT DSLAM Board. Developed & tested CPE Switched-Mode Regulators for Reference design & & helped customer debug problems w/ problematic their CPE noisy SMPS Regulators & RFI/EMI issues.
ECI Telecom Petah-Tikvah, Israel 9/1994 - 4/1999 Sr. Principal - Analog/Mix-Sig/Telecom - R&D
Led Analog in an R&D group to develop standard ADSL modems - “Echo Canceller” (CAT-2) & “FDM” (CAT-1). System & Chip development of Line-Driver and Analog Front End, in a complex project for development of an ADSL (CAT-II) CHIP SET in collaboration with Siemens Semi (later – Infineon Semi.). I was responsible for all Analog- System/Hardware, Infineon – IC. Invented: Adaptive Analog Echo Canceller, published ISSCC 1999.
Education: MSEE/BSEE in Computer & Electrical Engineering, Ben-Gurion University, Israel. 6 Patents, 4 Publications.
12+ Years of Technical Lecturing & Teaching in different Academic institutes diverse subjects, ranging from Analog, Control, Logic, Projects & more.
Course: Power-Elect Dr. S.Cuk; Power-Sup Workshop Dr. R.Ridley; Advanced MATLA Mathworks; Advanced Analog Spice Dr. S.B.Yaakov
Israel Airforce Israel: Tech. & Instructor on Airborne Communication, Navigation Systems & Standard Testing Equipment.
SW Tools: MathCAD/MATLAB/Simulink, Pspice/LTspice/TinaTI/Spectre/SIM-Metrix/PLIS, OrCAD/Altium/Eagle, Super-Filter.