Firmware Engineer Principal

Shailesh Patel

Austin, TX 512-***-**** **********@*****.*** LinkedIn

Principal Firmware Engineer

Principal Firmware Engineer with extensive professional experience, specializing in SOC bring-up, debug led to provide root cause analysis, firmware development, system design, validation, and subject matter expertise. Demonstrates proven ability to lead and mentor engineering teams, with a robust background in Emulation, Post silicon validation, and BIOS firmware. Extensive experience spans the full firmware development life cycle, including coding standards, code reviews, source control management, build processes, testing, validation, and operations. Holds a master’s degree in electrical engineering, and seeks to leverage expertise in a challenging and dynamic environment.

Hardware and Firmware Expertise

Firmware and Hardware Design: Client/Embedded/Server/Gaming silicon & CRB platform bring-up BIOS firmware System architecture Power features implementation.

Software Development: C C++ Assembly programming Python.

Debugging Tools: JTag Debugger (AMD HDT) ARM DS5 debugger Insyde Debugger (DDT) AMI Debugger Intel Debugger (ITP) UEFI Shell DOS Debug32 UEFI Capsules update PDT STB USB Analyzer Logic Analyzer Oscilloscope.

Operating Systems: Microsoft Windows (Client/Server) Linux Power Shell UEFI Shell MS-DOS.

Microprocessors and Microcontrollers: AMD & Intel APU/CPU x86 64/32-bits Motorola 68000 Series Zilog Z80 Z180 Hitachi 64180 Dallas DS5000T (8051) Philips 8051-XA.

Project Management: Cross-functional team leadership Project lifecycle management Issue prioritization and resolution Collaboration with internal and external teams.

Industry Standards: Coding standards Code reviews (Gerrit) Source control management (Git SVN) Build processes Testing Operations.

Professional Experience

AMD, Austin, TX Mar 2022 – Jun 2024

Senior Member of Technical Staff – Firmware Engineer,

Spearheaded the development and preparation of platform BIOS firmware for the latest Gaming AMD RYZEN silicon, covering all stages from simulation, emulation and bring-up to production, ensuring operational excellence and seamless integration.

•Delivered expert support for gaming silicon BIOS across North America, resolving complex issues related to customer reference boards (CRBs) and customer debugging in collaboration with multiple IP and global teams.

•Successfully implemented advanced power features and integrated bespoke customer requests into firmware, enhancing overall system performance and user satisfaction.

•Played a key role in the customer feature development and optimizing firmware, contributing to cutting-edge innovations in the industry.

•Enhanced firmware quality by developing innovative tools and implementing process improvements for memory tuning and issue triaging, while also mentoring junior team members to elevate overall team performance and expertise.

Insyde Software Inc, Austin, TX

Architect, May 2019 - Mar 2022

Led the development of innovative features for client, embedded, and server platforms, serving as the primary liaison between Insyde Taipei and AMD engineering teams to ensure seamless collaboration and integration.

•Served as the cross-functional team lead for the development and bring-up of firmware for AMD CPUs/APUs across diverse silicon segments, rigorously ensuring compliance with industry standards and swiftly resolving complex technical issues.

•Proficient in advanced debugging tools and methodologies for comprehensive hardware register-level, source-level, enhancing system stability and performance.

Sr. Principal Engineer, Apr 2007 - May 2019

Directed the development and bring-up successfully BIOS firmware on AMD CRB platforms for all CPUs/APUs across diverse silicon segments, rigorously ensuring compliance with industry standards and swiftly resolving complex technical issues with IPs teams (e.g. PCIe, USB, DDR3/DDR4, PMFW, PSPFW, SPI, I2C, UART etc).

•Worked with Insyde Software North America Customers using AMD Silicon (Client/Server/Embedded). Collected the issues and prioritized with internal teams (Kernel, Chipset, platform BIOS porting, different IP teams) to resolve them by analytical analysis and provide solutions to the AMD/Insyde customers.

•Led the planning, design, development, and validation of platform BIOS, overseeing the entire project lifecycle from simulation to real silicon bring-up for client, embedded, and server platforms, ensuring timely and successful product launches.

American Megatrends Inc., Norcross, GA Sep 1998 - Apr 2007

Principal Engineer,

Led research and development of system firmware core modules, ported multiple chipsets (both Northbridge and South Bridge components), updated legacy modules to current standards, and modified various BIOS utilities.

•Led the development of CPU eModules for IA-32 mobile, desktop, and server CPUs, directing system firmware architecture and implementing new technologies like PCI 3.0.

•Developed complete generic HHM UEFI drivers. Researched and developed system firmware core modules, updating chipsets and BIOS utilities.

•Delivered the Quality of the BIOS /Source Code deliverable that is Error-free and serves the critical process of bring-up and customer requirement of all their product classes.

Scientific Atlanta Inc., Norcross, GA Jun 1995 - Jun 1998

Sr. Electrical Engineer,

Designed and developed hardware and firmware for the Head-End Modulator-Demodulator and IR communication module for MainGate on 8051XA and 68HC05J2 microcontrollers to improve communication and control functionalities.

•Engineered and implemented hardware and firmware solutions for the GE meter and MainGate simulator using 68HC05J2 microcontrollers, and designed the Gateway digital WAN card.

•Developed firmware for the Superstar 266 digital thermostat on the 8051 microcontrollers, enhancing temperature regulation and system efficiency.

Lathem Time Corporation, Atlanta, GA May 1989 – Jun 1995

Sr. Electrical Engineer,

Designed and developed the product feature, firmware specification and hardware for Time & Attendance System and Electronic Job Clock System on Zilog Z80180/Z180 MPU Family and Motorola 68K family microcontroller.

•Developed Product Specification for Security Guard Scanner (TourScan) working with marketing and engineering team. on Dallas DS5000T (8051) and Hitachi 64180 microcontroller.

•Designed and developed the real time systems specification, hardware and firmware for time and attendance on Zilog Z80180/Z180 MPU and for Electronic Job Clock on Motorola 68HC05L5.

•Designed and developed data collection system (LAN time and Attendance Systems) using Hitachi 64180.

Education

Master of Science (M.S.) in Electrical Engineering University of Lowell, Lowell, MA

Bachelor of Science (B.S.) in Electronic Engineering Maharaja Sayajirao University, Baroda, Gujarat

Bachelor of Science (B.S.) in Mathematics Sardar Patel University, Vallabh Vidyanagar, Gujarat

Contact this candidate