JOHNNY CHANG
C: 510-***-**** ***********@*****.***
Summary
14+ years electronic lab experience of discover the root causes on failure cases and solution provide with consumer and industry, aviation, sailing, automobile and military related customer
Forward-thinking Electrical Engineering with hand-on experience performing quality troubleshooting, failure analysis, reliability test on electronics system and component level. Leading FA/QA projects in UL, EAG, ISE, IST, AMER, FA, RQE, ICE labs to use Oscilloscope, Curve tracer, ZAP master, ZAP gun, Build in chamber, Temperature forcing system, Liquid crystal, Emission scope, OBIRCH, Thermal scope, EDS, SEM, C-SEM, X-ray CT scan, EDX to discover product issues.
Team work with Delphi/GM, Toyota, Mitsubishi, Samsung, LGE, Sanyo, Hitachi, Airbus engineering team to solve issues from time to time.
Skills
*Semiconductor and Electronic system
Failure Analysis
*Laboratory operation, equipment handling,
characterization & management
*Reliability testing *Electronic system troubleshooting
*OrCAD Schematic reading and editing *Project management
*System Level Test development *Quality assurance and improvement
* Power PCB layout reading, PCB
modification.
*SOP/ECN generate and follow up
*Power analyzer, Oscilloscope, X-Ray, CT,
IR scope operate.
*ATE/Handler/Thermal enforcer
operate/troubleshoot
Experience
Failure Analyst 10-2022 to 2-2023
Google EFFA Lab San Francisco, CA
● Failure analysis on device and system level for multiple product lines.
● Lab equipment arrangement.
San Francisco Bay area Service representative 03-2018 to 10-2022 VT Miltope / Singapore Technologies Engineering San Francisco Bay area, CA
• In charge of Bay Area Rapid Transit (BART) Bombardier new fleet project in communication system and PIS system support.
• Trouble shoot/Failure Analysis/Solutions provide/System verification/System upgrade on Communication/PIS systems.
Engineering Support Center 08/2017 to 02/2018
Intel San Jose, CA
• AST/CMT tester trouble shoot/install/testing
• Delta Handler trouble shoot/install
• Tester arrangement
• Engineering sample handling
• Engineering task support
Consultant 10/2015 to 05/2016
Lifetrak Fremont, CA
• Consult in subcontractors
• QA – quality analysis to found root cause of product failures
• QC – develop quality check pressure chamber method on critical environment models
• FA – analysis product power consumption issue on mobile models
• Re-work – develop methods to re-work to solve difference issues on products Sr. Product Engineer 04/2010 to 06/2015
Intersil Corporation Milpitas, CA
• Conducted failure analysis during device design stage and system stage in customer applications
• Perform QA/FA analysis and issue test report. Develop solution for customers
• Managed system level test (SLT) production lines to solve issues found by FAE and provided answers to industry/ automotive customers
• Handled reliability test processes, reliability hardware design and product qualification
• Manage and repair SLT related electronic test systems and reliability test systems mechanical and electronic circuits
• Leaded the automotive display chip product line releases
• Performed standard operation procedures
• Executed test plan with multiple sub-contractors in USA, Taiwan, Japan and Malaysia
• Tested coverage solution and implemented pre-production schedule planning
• Planned production release schedules with Production Manager and Marketing Department
• Handled chip copper wire migration projects and subcontractor migration projects Product Engineer 04/1999 to 04/2010
Techwell Inc San Jose, CA
• Managed AEC-Q100 and JEDEC reliability planning
• Conducted reliability test flow design and implementation
• Performed reliability test hardware design and ATE load board design
• Provided support to top electronic companies with on-site demo and failure analysis
• Executed test plan at multiple sub-contractors in USA, Taiwan and Japan
• Handled failure cases analysis for security and automotive products
• Performed semiconductor test coverage metrics
• Provided remote and on-site support to subcontractors with 24/ 7 responds
• Debugged customer sample circuit board and provided support for FAE team
• Coordinated EMI projects at Underwriters Laboratories
• Designed ATE load boards
• Handled equipment procurement, price negotiation, setup and calibration QC/QA/Rework/RMA line supervisor/ Production Engineer 03/1998 to 04/1999 Jaton Corporation Fremont, CA
• Leading the QC/QA/Rework/RMA team to monitor/analysis in-house/field failure cases implement.
• Team work with RD and Production lines to bring in any of issue from backend and provide solution for product lines.
Project Manager /Hardware Engineer 1987-1997
Taiwan Transtech Inc Taiwan
• Managed antiquities record digitization projects at Taiwan National Palace Museum
•Instructor/ Trainer
Taiwan Regional Civil Servants Development Institute Department of Defense/ Military School
Taipei Medical University
Taiwan army reserve system training courses
• Managed and leaded fast response field support team on server/network systems for Taiwan defense department.
• Performed hardware installation and repairs in any location customer requested
• Handled setup and support for Taiwan military reserve network Education and Training
Computer programming entry/advanced classes Taipei, Taiwan Institute for Information Industry
Department of Management and Information Taipei, Taiwan National Kongzone University
C++ programming academic credit CA, USA
Chabot College
A+ computer tech CA, USA
A+ computer tech
Complete Certified: Job Training
Intel Training Class:
Basic EDS
SEM Operation
Advantest T2000 Level II training
Delta Design Pyramid Handler Level III training
Emergency Management Process Overview
ESD Control and Auditing
Assembly Test ESD
PG7 Technical Lab HVI and ESD
PSG Electrostatic Discharge
ESD Education Package
Electrostatic Discharge Awareness
ESD for Warehouse
Lab Safety
ESD Safety LASER SAFETY
LEAD AWARENES
SCSF11X PSM Nitrogen Trifluoride Safety
Electrical Safety Module One Concepts and Procedures IT Data Center Safety and Security
300mm Wafer FOSB Read and Understand
Thin Wafer Handling in Die Prep
SPTD Safety Overview and Cleanroom Gowning
Robbery Response