Mark Mester Sr.

ad3ypy@r.postjobfree.com

443-***-****

Clearance TS/SCI W/Full Scope Poly (NSA Retention Badge) Clearance is current as of March 25, 2022.

Educational Background BS Electronic Engineering Technology Capitol University, Laurel MD, 2003

Summary of Experience: Latest position October 2022 – 2024 February 2nd. Leidos subsurface warfare division.

General Overall Skillset:

C, C++ Microsoft Project, Visual Studio, Power Point, ORCAD, Altium layout and schematic capture use. Word. Project Management, Technical writing, Briefing, System Design, Extensive wiring and assembly experience, soldering, Bipolar Electronic Analog design, Requirements gathering and assembly, Scheduled development using Microsoft Project; made extensive use of Microsoft Project, and, SharePoint, and developed many schedules for DOD projects, to include Crypto Production System designs. Performed initiation, planning, plan execution, project oversight/monitoring, and project closure. Project closure was followed by the complete authoring (sole authoring in many cases) of User, Troubleshooting, and any required manuals. Authored project meetings through power point slide presentations and presided over these meetings with upper management levels within the National Security Agency/DOD. Skilled in the use of Oscilloscopes, and most measuring equipment. Made extensive use of IBM Clear Quest Rational workflow automation tool, and Clear Case tool that supports software configuration management and development. Utilized SharePoint for sharing documents, performed test case SIT algorithm development and Test Plan authoring for JAVA encryption programs. Used JIRA for use cases, and requirements.

Most Recent position: Location: Leidos, Lynwood Washington State:

Served as Analog Engineer designing custom circuit modules for Leidos Underwater warfare/Maritime division. Utilized Bipolar, MOSFET, OPAMP, technologies to develop complex circuitry to meet customer requirements. Performed extensive wiring for the vehicles, interpreted schematic and wiring diagrams, and developed extensive schematic and inner wiring diagrams, technical documentation, use cases, requirements, and technical documentation for various programs. Served as lead Electrical Engineer on projects. Authored System Engineering document designed use cases requirements, user stories, and most of document contents. Wrote trade studies and assisted in proposal writing. Performed extensive testing on Acoustics amplifier systems using signal injection and AIM oscilloscope laptop analysis. Performed extensive trouble shooting and debug on electronics and electrical vehicle trays after design and assembly. Utilized common instrumentation equipment such as voltmeter, signal generators and oscilloscopes, digital analyzers. Designed Underwater vehicle circuit/CCA models to accommodate all physical items prior to testing.

October 2021 – October 2022 Redmond Washington

Senior Software Engineer for Microsoft secure cloud infrastructure through Zachary Piper corporation. Performed test cases for debugging and correction of infrastructure test suite. Documented and updated results

October 2018 – 2021 October: Senior Systems Engineer for Cyber Cloud Technologies Fort Meade MD

Utilized the JIRA toolset for Story and Task development on a major software effort to develop, document, and provide guidance and eventually merge new software capabilities into the existing SW/HW infrastructure.

Managed progress on the project through velocity measurements of Change Request software updates through Excel documentation.

Made extensive use of the IBM Clear Quest Rational workflow automation tool, and Clear Case tool that supports software configuration management and development.

Developed and documented System Integration Tests, Test Plans for JAVA encryption programs.

1983 – October 2018: Senior Systems Engineer for NSA Fort Meade MD

· Performed in the System and Electrical Engineering role, and as Project Manager for cryptographic engineering designs that have been deployed.

· Digital relay electrical controller design, software flowchart, vast electrical design development, and project oversite on many Information Assurance Systems for the DOD.

Developed test cases, testing documents, and all technical manuals for this position

· Developed customer technical, system, and security requirements and converted into system solutions for various cryptographic production designs.

· Translated requirements into software and hardware system specifications, and final system architectures.

· Electronic Circuit Developer using bipolar analog design technology for designs, prototypes, and builds deployed into production systems. Developed Extensive wiring designs and diagrams, and schematic diagrams.

· Developed extensive technical manuals for Crypto-Production equipment designs, to include maintenance manuals, user guides, schematics, and software diagrams.

· Extensive experience in Cryptographic system production design. Pioneered and designed an automated and verification print system (BDPS), using an in-house custom hardware controller design, custom software control, and an integrated COTS printed system.

Sole designer on a cryptographic interface design that used 750 volts DC to verify soldered connections on a hard coded encrypted circuit board assembly; (in use today).

· Developed a dedicated and functioning hardware control circuit on an Altera Ball Grid Array (BGA) for an encryption algorithm, using Altera proprietary language (Circa 2000)

· Utilized C, C++ programming on several in-house designs, (circa 2005) to include conveyor belt machine control, and a software application that interfaced with a production system to capture and store video images.

· Designed analog motor control circuit boards utilizing 555 ICs and Bipolar technology for prototyping input control concepts, developed the initial electronic controller, and served as the lead PM for the entire project frame, through delivery.

· NSA Invention Award (circa 2006) for co-designing a complex electronic interface, PC sized GOTS hardware device (utilizing the following DC voltages, 5, 6.5, 55, 12 and 95) between an electro-mechanical punch mechanism and a 128-bit random producing computer. Solely developed custom dual channel analog driver circuit boards for interfacing VHDL logic circuitry, and performed final updates to the VHDL logic code.