Rakin B. Mazid

**** ********* ***. ******, ** ***27 512-***-**** ad3sq2@r.postjobfree.com

Objective

Seeking a part-time remote opportunity suited for an individual with a technical background.

Summary

10+ yr. Experienced Engineer with a demonstrated history of working in the semiconductor industry. Skilled in System-level Post silicon validation in power, performance and thermal. Experienced in automated test environment at both wafer probe and class final test. Areas of expertise include data analysis using JMP Pro software to debug and resolve test/yield issues; manage product qualification, engineering assembly builds, and customer deliverables; Basic software skills in Perl/Python scripting and C programming. Strong support and detail-oriented professional with a Bachelor of Science in Electrical Engineering from The University of Texas at Austin.

Skills & Abilities

Testers: Teradyne J750 and UltraFlex

Data Analysis: JMP, Excel, Electronic Wafer Mapping

Lab Equipment: Signal Generators, Multimeter, Power Supplies, Oscilloscope, NIDAQ, Medusa

Software: C, Perl, Python

Others: Certified Six Sigma Yellow Belt

Professional Experience

SYSTEM VALIDATION ENGINEER INTEL CORPORATION JUNE 2018 - MARCH 2023

·Responsible for the development of methodologies, execution of validation plans, and debug of failures for Intel server-based products in the Power-Thermal-Performance (PTP) group

·Plan and execute system to tester correlation for power and thermal necessary for TDP, SDP, and Cdyn

·Validate thermal management flows consisting of DTS Accuracy Checkout, Prochot, and Cattrip to ensure SoC health and functionality across supported temperature ranges

·Drive optimization improvements through analysis of workloads and silicon behavior and help establish PTP tools and methods standardization

PRODUCT ENGINEER NXP SEMICONDUCTOR DECEMBER 2015 – JUNE 2018

·Monitored production test results of assigned devices and identified top priorities to drive test and process improvement

·Performed statistical/data analysis of test parameters using JMP to determine the root cause of product failure and identify resolution for process or program improvement

·Worked with test module owners to improve the test coverage and optimize the test methodology to improve both the product cost and quality

·Supported customer returns (CQI) on products by failure analysis and identified problem and containment actions alongside FA group

PRODUCT ENGINEER FREESCALE SEMICONDUCTOR JANUARY 2014 – DECEMBER 2015

·Took ownership of assigned devices and managed engineering assembly requests, product testing, and customer deliverables in a timely manner

·Collaborated with cross-functional teams to address and resolve process related defects, customer application failures, and product manufacturing issues

·Executed parallel testing of Universal Test Interface and vertical probe Logic Test on Teradyne J750 and UltraFlex testers for multiple 55nm automotive microcontroller devices

·Experienced in many areas associated with probe, from prober clean-room environment to probe hardware/test debug

·Implemented zero defect methodology using Electronic Wafer Mapping to guarantee maximum test coverage

SYSTEM VALIDATION INTERN INTEL CORPORATION MARCH 2013 – DECEMBER 2013

·Performed Atom chip validation for core power, performance, and thermal testing of new processors

·Developed python scripts to execute thermal tests and analyze results

·Managed and modified Python SV based automation framework tool to execute tests

·Found elusive bugs and reported sightings

·Assisted with execution of validation plan based on datasheet

PRODUCT TEST INTERN CIRRUS LOGIC MAY 2012 – DECEMBER 2012

·Developed a SPI Control Port Reader and GUI using both Perl and Python

·Performed characterization tests on audio chips using Teradyne uFlex

·Collected and analyzed production lots data across multiple fabs

·Supported customer returns (RMA) on products by testing & analyzing the data

·Conducted thermal experiments to maximize product performance

Education

BACHELOR OF SCIENCE DECEMBER 2013 THE UNIVERSITY OF TEXAS AT AUSTIN

·Major: Electrical Engineering

·Related coursework: Analog Integrated Circuit Design, Power Electronics Lab, Real-Time Digital Signal Processing Lab, Senior Design Project, Electronic Circuits I, Digital Logic Design, Introduction to Microcontrollers

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