Austin, TX,*****

ad3b85@r.postjobfree.com

512-***-****

WWW.LINKEDIN.COM/IN/VIDAMERCADO

VIDA MERCADO

PROFESSIONAL SUMMARY:

Competent self-motivated professional with over 29 years of Semiconductor Industry experience. Adept at promoting efficiency, productivity, and yield improvement through organizational development, cross-functional team leadership, and continuous improvement methodology.

SKILLS AND COMPETENCIES:

●Six Sigma Yellow Belt

●Design of Experiment, Partition/Split Analysis

●Data Analysis, Mining, Extraction JMP, Excel, SQL

●Multivariate/ Surface Response, Fit, Wilcoxon

●Lean Concepts, 5S, Kaizen, Process Map, 9-Box

●Cost, Defectivity, Productivity, Standard Work

●Equip Capacity, Availability, OEE, WIP

●Communication/Presentation Skills

●Word, Excel, PowerPoint, Beer Pong

●Statistical Process Control, Shewhart Rules

●Performance Metrics, Peer Review

●Final Test/ Wafer Test

●Project Management

●Quality Assurance

●DF Pattern: BF/DF, KLA2xx, PUMA, Compass/Plus

●DF Unpatterned: Surfscan SP1/2, VisEdge Bevel

●SEM Review: AMAT SEMx, Optical, API

●Failure Analysis, X/Tilt SEM, TEM, FIB, EDX

●Defect Classification, Rough Bins, Void, Residue

●Defect Characterization, Klarity, Die/ Map Stack

●Defect Density (D0), Adders, CC1X, %DD, %CLUST

●In-Line Monitor, Yield Driver, Excursion Control

●Sleuth Correlation, Tool Commonality, LEH

●Root Cause Analysis, 8D, DMAIC, 5-Why

●Risk Assessment, RPN, FMEA

●New Product Introduction

●BCaM

●ISO Audit

EMPLOYMENT HISTORY:

NXP Semiconductor – [GNTC-A] - Austin, TX

NPI Technical Champion - SCE Edge Process Engineering [May 2021 – Present]

Execute core team assignment of New Product Introductions (NPI), representing Probe and final Test development. Collaborate with cross-functional disciplines to support Business line interests including First Silicon readiness, reliability testing, test plan development, and equipment,/ Kit hardware qualifications.

Perform DOE and time studies on assembly methods, Probe card pad and bump deformation,

Support floor operations (standard work instructions, area 5S, and operator training),

Manage probe card and Kit HW (program readiness, design, set-ups, BOM accuracy, supply chain vendor integrity).

FMEA Champion driving quality standards, process controls, and global ESD compliance.

Lead quality initiatives to mitigate risk, improve process capabilities, and drive performance.

Skorpios Technologies - Austin, TX

Engineering Technician: CFM & Defect Metrology: _ [Aug 2017 – May 2021]

Defect and CFM program development driving yield enhancement through inline defectivity improvements.

●Developed equipment and process capabilities to effectively monitor, control/ reduce factory and product level defectivity. Efforts focused on customer-based inspection planning, recipe optimization, defect review, analysis, and characterization.

●Analyze statistical reports to identify quality trends and contain defect excursions.

●Equipment owner: Defect Metrology – all supporting platforms. AMAT ComPlus and KLA SP1 Surfscan tools.

●Establish performance metrics and manage process capabilities of in-line defect support tools.

NXP Semiconductor – [ATMC] - Austin, TX:

Yield Engineering Technician III: FEOL Defect Elimination/ Control: [Sep 2006 - Oct 2016]

Defect Layer Owner, accountable for primary automotive, aluminum-based technologies. Focused efforts included identifying & reducing in-line defectivity throughout all Front-End Of Line (FEOL) stages.

●Managed quality systems to routinely collect and analyze complex defect datasets in line to establish & drive baseline defect density (D0) levels and prevent real-time defect excursions.

Austin, TX,78736

ad3b85@r.postjobfree.com

512-***-****

WWW.LINKEDIN.COM/IN/VIDAMERCADO

Conducted scrap investigations following 8D/ DMAIC processes to isolate factors and determine root causes. Analyzed potential failure points to mitigate system breakdowns and minimize future risk.

Implemented corrective measures to prevent recurrence. Report summaries were presented to engineering peer groups and staff.

●FEOL defectivity representative for device & process teams providing comprehensive defect analysis/ characterization supporting process optimizations and/or new equipment qualifications.

●Implemented various line improvements through Design of Experiments (DOE) and cross-functional team efforts to reduce waste, enhance productivity, and increase yield.

●Led several Kaizen events to resolve systematic defect/ process issues affecting the factory.

Scrap Metric Champion for Yield Enhancement Group.

SPC Metric Champion for Yield Enhancement Group.

Defect Metrology: AMAT SEMV G3 w/FIB, EDX & KLA Tencor SP1: [2006 – 2016]

Application and Equipment owner, responsible for all performance metrics, recipe development, SPC, tool matching, and overall manufacturability for high-volume defect inspection and review.

●Factory lead for In-Line SEM Defect review along with advanced localized API inspections and FA techniques, such as X/Tilt SEM, FIB, and EDX. Analyzed data for defect characterization.

●Led focus team in cost savings initiative focused on qualifying direct & second source vendors, extending life cycle for parts, and optimizing preventive maintenance saving over $25k/qtr.

●Led cross-fab advancement project to implement innovative process control methodology for the KLA SP1 toolset. Efforts significantly improved equipment performance and process control, saving the company $150k in annual vendor expenses.

●Established optimal settings, base templates, and a comprehensive guide for creating recipes on SEMV G3.

●Qualified and implemented new (used) AMAT SEMV G3 tool and associated analytical components.

●Defect Metrology: BF/ DF, KLA2xx, PUMA, COMPASS, SP1/2, VISEDGE Bevel, AMAT SEMVxx/ JOEL.

Freescale Semiconductor – [MOS 2,3,13] - Austin, TX

Senior Process Technician III: Thin Films, CVD: [1993 – 2006]

Process and Equipment owner for Atmospheric Pressure Chemical Vapor Deposition (APCVD) toolset. Responsible for recipe development, variability reduction, defectivity improvements, and process optimization for Undoped Trench fill (TEOS)/ Doped ILD0 (BPSG, BPTEOS) processes.

●Managed SPC, FDC, FMEA, and other quality systems for assigned toolsets and associated processes.

●Designed, executed, and analyzed experiments to screen and optimize various aspects of the processes and equipment to meet device, process, and manufacturing needs.

●Implemented and drove Factory Automation (GEM) for the WJ tools for operational ease and risk reduction.

●Facilitated control plan workshops to implement cost initiatives saving over $17k/qtr.

Films Metrology Tool Owner: - BIORAD FTIR: [2001 – 2006]

Developed, maintained, and updated calibrations for multiple doped dielectric films.

●Guided sister factory in implementing best practices.

●Wrote and deployed engineering guides and specifications for creating recipes.

●Metrology SPC Champ: Key user responsible for Limits, Charts, and Performance Reporting.

Process Sustainer: Thin Films Area [CVD/ PVD] [1993 – 2001]

Provided engineering support coverage for multiple diverse platforms in the CVD and PVD processing areas to sustain manufacturing in a high-paced, complex processing module.

[Applied Materials (AMAT) P-5000/ C-5200/ Producer, Novellus HDP/ C1-C2/ Sequel, WJ-999, (AMAT) Endura 5500, (AMAT) 5200 RTA/ WCVD]

●Dispositioned held or discrepant production lots. Managed equipment operations and tool recoveries.

●Worked with tool owners on various quality and efficiency projects to streamline Films Bay methodologies and operations.

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