David Dabeegu Kabassima

Silicon Valley, CA

Mobile: 813-***-****

Email: ad2ooh@r.postjobfree.com

Summary:

Validation design engineer with experience in Post-Silicon Power integrity validation and pre-silicon Virtual Platform (VP) validation in farm environment. Used UNIX and Linux to validate VP ingredients in command line interface tools and widgets. Built experience in DC-DC Buck converters and Integrated Voltage Regulators testing and debugging. Designed and Validated PID controllers for Microprocessor power modules and optimized their efficiency.

Debugged Errors in Server NPI and MP manufacturing environment and Maintained wiki for testing and debug.

Worked on RF/Wireless program and measurements including noise measurement, Electromagnetic Shielding, Period gram, eye diagram, BER, VSWR, VNA, and SA using ADS.

Designed, built, and tested active filters and Oscillators using multiple topologies in P-Spice.

Additional expertise and skills include:

C++, C, MATLAB, PSpice, JavaScript, Unix/Linux, LabVIEW.

Active filters design, testing and tuning.

Analog and Power Electronics, Load Flow

Oscilloscope and Circuit measure and analysis

PID Controller design, testing, tuning.

DC/DC power converters design and validation

Pre- and Post-Silicon Validation and Verification

DDR4/5, PCIE validation.

Certifications:

Fundamentals of Engineering (FE/EIT Certified), State of Florida BPE October 2011

Certified JavaScript developer.

Certified Linux, Python, HTML, XHTML, CSS, and XML Web Developer.

Microwave and Antenna Engineering Certification (In Progress).

SQL and JSON certifications (In Progress)

Java and Cryptography Certifications (In progress)

A+ Computer Repair and Upgrade Certification training by THA, Tampa, FL

Professional Experience:

Quanta Computer USA, Fremont, CA 07/2021 to 12/2023

Test Engineer/Validation Engineer

Server Computer Errors Troubleshooting and Debug in for Manufacturing environment.

Server Architecture assembly and testing for customers like Microsoft (MSF) and Meta/Facebook(FBK).

Testing of Server blades CPUs, FPGAs, SPI, UARTs, Motherboards, DIMMs, Power supplies, etc.

Testing of HC and MC and High Power (HP) components for Semiconductor equipments assembly and operation.

Validated, tested and documented DDR modules failure in Motherboards for Facebook/Meta.

Validated and tested PCIE modules in Servers for Meta Platforms.

Micron Technology, Inc., Test Validation Engineer Longmont, CO 12/2019 to 06/2021

Firmware installation and Update on M.2 and 2.5 SSD memory drives in SATA environment using Python and C++.

Used Python scripting methodologies for memory SAS and SSD testbenches validation.

RAID architectures design and management using Python and C++.

Error Correcting Codes (ECC) Testing and Validation on Semiconductor SSD Memory drives using PyVISA and SCPI instrument commands in Linux environment.

Experience with Remote server and networking using Linux and UNIX in Windows PowerShell drivers.

Drives recovery, cleaning, and testing for validation readiness using Python.

Designed DC-DC switching Power Supplies (Buck, Boost, Buck-Boost, Cuk, Sepic, Differential Buck).

Enterprise Server racks installation, starting, error testing and server shutting down.

Validated Manu data on SSD, SAS and eMMC drives.

TTM Technologies, Inc. Forest Grove, OR 03/2017 to 10/2018

Validation engineer

Worked in wafer PCB manufacturing company doing lamination of circuit boards for technology companies.

Operated machines in cleanroom environment for wafers photolithography testing and testpoints exposing.

Sampling, Quality Control and Refining of wafer Machines production output.

Intel Corporation Hillsboro, OR 10/2016 to 02/2017

Validation Design Engineer

Drove Intel Ice Lake Pre - Silicon Virtual Platform (VP) validation in Linux Server Farm environment.

Used UNIX and Linux to validate VP ingredients in command line interface and tool and widgets.

Validated and verified pre-silicon environments (Verification, Virtual Bring-Up) in Windows using Simics and Linux.

Used Jenkins and Excel to validate USB, SATA, DDR, PCIE, eMMC devices doing automation testing in Virtual platform.

Virtual Windows 10 development and Testing.

Used Linux and Simics development tools to integrate ingredients from different input variables such as the OS versions, Power Management, Security, etc into Virtual Windows 10.

Integrated UEFI firmware into Win 10.

Tested all Booting devices such as SATA, USB, SSD, eMMC, etc. in VWindows 10 OS.

Debugged issues from Booting devices testing and booting using Jenkins environment in HSD.

Provided release of Virtual Windows Pre-Si validation Recipe to teams across Worldwide Geographic locations.

Video Timing and Analysis measurements for GPU and GT domains in Virtual Windows 10 Validation.

Designed and built USB, eMMC, SATA hardware booting recipes to Windows Platform with UNIX and Linux.

Created Release on VP to more than 400 customers and prepared bug reports.

Intel Corporation, Hillsboro, OR 10/2012 to 05/2015

Component Design Engineer

Impedance, Voltage, Current and Gain stability testing and tuning for VCO, PLL using Oscilloscopes, DMs and DAQ.

Led post-silicon microprocessor electrical validation for HSW, BDW and CNL class microprocessors using Python.

Used Oscilloscope and Circuit measure and analysis for CPU Power management and Efficiency testing.

Automated laboratory measurements and testing of CPU voltage regulator power module and efficiency optimization using DC power supplies and electronics loads in XML, Excel and JMP environment.

Validation of Circuits boards and CPU Power Efficiency using lab test equipment, Scopes, multi-meters, and Digital Electronic Loads.

Validated the Integrated Voltage Regulator PID Controller in CPU domains (Core, Graphics, etc.).

Drove Buck converter and voltage regulators power efficiency testing using Python and JMP instrument commands.

Managed Impedance phase angle optimization, Circuit boards, DAC linearity testing using Python/Excel/JMP.

USF, Tampa, FL 01/2010 - 05/2012

Electrical Engineer and Lab Instructor

Designed reverse pendulum and automobile proportional integral derivative (PID) cruise controller using digital and linear concepts in MATLAB environment.

Did Independent studies on Complex Systems Engineering, User Stories, Use Cases and SCRUM.

Supervised students in Electronics lab II projects such as square and triangular signal generators, 555 timers, and synchronous and asynchronous multivibrators, and worked on LabVIEW projects.

As group project, built heart rate monitor: full design, build, and test phases.

Conducted independent studies on Wireless Cognitive Radio Security.

Worked on RF/Wireless program and measurements including noise measurement, Electromagnetic Shielding, Period gram, eye diagram, BER, VSWR, VNA, and SA using ADS software and MATLAB.

Designed, built, and tested a DC-DC Buck converter using lab power supplies, oscilloscope, DIMM.

Designed, built, and tested active filters and Oscillators using multiple topologies in P-Spice.

EDUCATION:

MS, Electrical Engineering (GPA: 3.48/4.0), University of South Florida, Tampa, FL - 12/2011

BS, Electrical Engineering, University of South Florida, Tampa, FL - 12/2006

HONORS

National Science Foundation (NSF) STEM

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