JASON REID

San Jose, CA 408-***-**** ad11u0@r.postjobfree.com

www.linkedin.com/in/jason-reid; https://careerwebfolio.com/jasonreid/

PROFESSIONAL SUMMARY

Senior manager and multi-disciplinary technologist who combines scientific first principles, manufacturing discipline, data science, and inclusive communication to build teams and deliver novel products and materials in Semiconductors, MEMS, Displays, HDD, and renewable energy.

EXPERIENCE

VP OF TECHNOLOGY DEPLOYMENT (Acting), Maxeon Solar Technologies 2022 – Present

Leads 140 process, equipment development, NPI, BOM, automation, silicon, project management, and product lifecycle engineers in 5 countries for cell and module technology development/deployment for IBC and PERC solar panel products. Board representative for portfolio company in semiconductor packaging space.

DIRECTOR OF MODULATOR TECHNOLOGY, KLA-Tencor (Orbotech) 2017 – 2022

Led team of polymer chemists, device physicists, process, mechanical, systems, software, and optical engineers in developing and sustaining production line for consumable electro-optic modulator based on liquid crystal + polymer “NCAP” emulsion technology for TFT and OLED metrology in flat-panel display manufacturing. Responsible for outsourced foundry production of dielectric mirrors.

Sustained gross margins of >60% on $15M product line in face of increased competition and technology requirements

Successfully made business case to KLA executives to keep modulator manufacturing group in Bay Area after KLA acquisition. 35 jobs saved. Line migrated and capacity doubled to KLA campus

Developed novel formulation techniques and chemical additives to enable use of consumer-grade chemicals for electronic-grade applications to meet customer requirement and avoid costly refinement procedures

Developed entropic and threshold algorithm techniques to identify defects in noisy images to enable next-gen product

PRINCIPAL TECHNOLOGIST/VACUUM DEPT MANAGER, TDK 2010 – 2016

Managed manufacturing process and equipment engineering for Vacuum Dept (Sputter, Evaporation, IBD, IBE, CVD, ALD, RIE, FIB, Metrology) in sustaining 32nm magnetic head line for HDD. Led materials development, device integration, and reliability testing, FA for thermally-assisted magnetic recording (TAMR) program.

Improved key manufacturing parametrics to fab-record levels for by introducing numerous semiconductor BKMs and driving task forces.

Reduced research and development costs and time while simultaneously increasing TAMR device lifetime by 100x by leveraging material science skills and creating strong outside collaborations to bolster internal combinatorial alloy development capabilities for plasmonic antenna development.

Eliminated “not my problem” culture and produced two generations of managers by creating interdisciplinary focus teams for junior staff members to lead and grow

VP OF PROCESS DEVELOPMENT, Crocus Technology 2008-2010

Built and managed magnetic memory process team that delivered consistently-yielding prototypes at SVTC and transferred processes to the overseas foundry. Responsible for eight reports in three international locations.

Created a manufacturable process for thermally assisted magnetic (MRAM) arrays in only two years by forging strong collaboration with the CMOS base wafer foundry and developing a lean, versatile process, equipment, design and test team in a shared-foundry environment.

Attained MRAM yield on early lots on the overseas foundry transfer of disruptive technology by ensuring extremely tight coordination between the company, capital equipment suppliers, foundry engineering staff.

Reduced device power requirements, improved endurance and allowed integration by inventing a thermally insulating, electrically conductive electrode for thermally-assisted MRAM switching.

Developed several novel rf-based RIE processes to etch magnetic materials based on NH3/CO, Ar/O2 to stop robustly on MgO tunnel barrier and enable transfer of MRAM devices to foundry

ENGINEERNG MANAGER, Intel Corp 2004-2008

Co-managed daily manufacturing and equipment engineering for the thin film group on 32-65nm NOR Flash production and development line. Led materials development team for cross-point phase change memory. Responsible for 12 direct reports, including process engineers, equipment engineers and technicians as well as 50 indirect reports.

$10M saved along with 18+ months of development time with the delivery of new memory element and diode materials and created Damascene CMP process for the first generation cross-point memory array offsite by challenging standards on in-house development and propelling unprecedented partnerships with foundry service partners.

Co-developed modification of AMAT Endura sputter tool to support RF dep, enabling chalcogenide deposition.

Averted prolonged R&D costs by inventing cross-point diode material that cut leakage current 1,000x by confronting conventional theories on the device physics and instituting new theoretical models to drive materials development, delivering chalcogenide diode material and codeveloping memory element for 1st gen product.

20% reduction in COG, test wafer and spares costs in the thin film area and a 0.6% improvement in yield reached by reassessing OOC statistics weekly, extinguishing several line excursions and making equipment changes to enhance equipment control and reliability in PVD and CVD areas for the 32/45/65-nm NOR flash lines.

DIRCTOR OF ENGINEERING, Silecs Inc (Finland) 2001-2004

Led molecular modeling, precursor, polymer, process, and test engineering teams as well as customer Joint Development Agreement engagement for novel spin-on low-k organosiloxane material for semiconductor customers.

Saved Silecs from closure by presenting a successful business case to investors to pivot material direction from optical waveguide components to semiconductor low-k dielectric and hard mask applications. Delivered the first-generation commercial product to customers in only ten months, meeting tranche funding goals. Installed as company leader by lead investor.

Demonstrated $30 wafer/start savings with 25% drop in interconnect capacitance on customer 4Mb 90nm SRAM vehicle using first generation low-k products by developing processes and utilizing four offsite vendors for processing steps outside customer fab capabilities.

Developed novel rf RIE recipes for high-resist preservation to etch high-C SiCOH low-k films on AMAT platform

Reduced time for screening new chemical formulations from 28 to 2 days, substantially reducing costs, by reshaping the corporate culture, grooming managers, installing management-by-objective and open decision-making principles, and by reorganizing modeling, precursor, polymer, and process/test staff four cascading groups.

PRIOR EXPERIENCE

Freelance technical advisor (2000-Present): Expert witness testimony, VC portfolio company screening; Consulted heavily in developing rad-hard, low-noise JFETs, diodes, BJTs, x-ray detectors; solar; NVM

Technology Manager, Reflectivity owned foundry outsourcing and charging/stiction programs for micromirror MEMS device competing against Texas Instruments DLP

Engineering Group Leader, Intel responsible for thin films + metrology areas and tool selections on 0.25/0.18µm logic and Flash fabrication line. Let mid-section and back-end yield taskforce teams. Pentium fabrication instructor. EUV lithography representative at LLNL.

EDUCATION

PhD, Applied Physics, California Institute of Technology. Dissertation: Amorphous Diffusion Barriers for Silicon Metallizations

BS, Applied Physics, University of California, Davis (With honors, Departmental Citation)

TECHNICAL SKILLS

Semiconductor/MEMS/HDD/Display Process Fabrication: Thin Films, Photolithography, Diffusion, Reactive Ion Etch, Implant, CMP, Wet Etch, Plating, Defectivity, Test, Yield, Reliability, SPC, DOE

Material Systems: Interconnects, silicides, dielectrics, organic/organosiloxane polymers, ferroelectrics, optical, plasmonics, liquid crystals, amorphous metallic glasses, chalcogenides, thermal barriers, self-assembled monolayers

Materials characterization: SEM, FIB, TEM, XPS/ESCA, RBS, SIMS, XPS, AES, XRD, SAS, FTIR, Ellipsometry, nanoindentation, Stress/Strain, IV, CV, PL, EBIC, Rs, ICP, GPC, TGA, DSC, DLS, stress/strain, Karl-Fischer

Software/Modeling: TCAD, Process and Device Simulation, Molecular Dynamics, thermodynamics, statistics, Matlab, GDS design, Yield, Optical, Geometric Algebra for computer graphics

PATENTS/FILINGS

J.S. Reid, K. Gutierrez Cuevas, Method for Fabricating a Liquid-Crystal-Based Electro-Optical Light Modulator Using Surface MEMS Techniques for Flat Panel Display Inspection (Appl 18/244,087)

C. Chen, K. Gutierrez Cuevas, J. Reid, “Paraffinic Compound AdditionTo Liquid Crystals For Reduced Switching Voltage On NCAP-Based Electro-Optical Modulator” (Appl 18/208,553)

J. Reid, K. Gutierrez Cuevas, N. Viswanathan, “Cationic Gettering in Liquid Crystal NCAP and PDLC Films” (Appl 17/892,558)

K. Gutierrez Cuevas, J. Reid, N. Viswanathan, “Porphyrin and Pthalocyanine additions to Liquid Crystal”

D. Beery, J. Reid, J. Shin, J-P Nozieres, “Magnetic Random Access Memory Cell with Isolated Liners” (9,059,400)

J. Reid, “Magnetic Tunnel Junction Structure,” (8,907,390)

J-P Nozieres; J. Reid, “Method for use in making electronic devices having thin-film magnetic components” (8,652,856)

E. Gapihan, K MacKay, J. Reid, “A Magnetic Device with Optimized Heat Confinement” (8,411,500)

J-P Nozieres, J. Reid, “Method for Use in Making Electronic Devices Having Thin Film Magnetic Components (8,409,880).

S. Ovshinsky, T. Lowrey, J. Reed, S. Savransky, J.S. Reid, K-W Chang, “Ovonic threshold switch film composition for TSLAGS material (8,148,707)

S. Savransky, I. Karpov, J. Reid, “Higher Threshold Voltage Phase Change Memory,” (Published application 2009/0072218).

J. Lee, K-W Chang, J. Reid, Y. Derweer, A. Diaz, “Forming a Carbon Passivated Ovonic Threshold Switch” (7,39,815).

R. Hamamjy, K-W Chang, J. Reid, “Forming Ovonic Threshold Switches with Reduced Deposition Chamber Gas Pressure,” (Published application 2007/0227878)

J.S. Reid, N. Hacker, N. Pirila, J.T. Rantala, W. McLaughlin, “Method of Forming Low-k Dielectrics” (6,960,305).

J.C. Doan, S.R. Patel, A.G. Huibers, and J.S. Reid, “Methods for Forming and Releasing microelectromechanical structures,” (6,960,305).

J.T. Rantala, J.S. Reid, T. Tormanen, N.S. Viswanathan, A. Maaninen, “Poly (Organosiloxane) Materials and Methods for Hybrid Organic-Inorganic Dielectrics for Integrated Circuit Applications” (7,473,650).

J.T. Rantala, J.S. Reid, N.S. Viwanathan, T.T. Tormanen, Thin Films and Methods for the Preparation Thereof,” (7,479,462).

J.T. Rantala, J.S. Reid, N.S. Viswanathan, and T.T. Tormanen, “Materials and Methods for Forming Hybrid Organic-Inorganic Dielectric Materials for Integrated Circuit Applications” (7,060,634).

J.T. Rantala, J.S. Reid, T. Tormanen, N.S. Viswanathan, A. Maaninen, “Poly (Organosiloxane) Materials and Methods for Hybrid Organic-Inorganic Dielectrics for Integrated Circuit Applications” (7,144,827).

J.S. Reid, N.S. Viswanathan, “Materials and Methods for Forming Hybrid Organic-Inorganic Anti-stiction Materials for Micro-Electromechanical Systems” (7,256,467).

J.T. Rantala, J.S. Reid, T.T. Tormanen, and N.S. Viswanathan, “Semiconductor device,” (6,974,970).

J.S. Reid and N.S. Viswanathan, “Method for Removing a Sacrificial Material with a Compressed Fluid” (6,958,123).

J.S. Reid, “MEMS Device made of Transition Metal-Dielectric Oxide Materials,” (7,057,251).

J.S. Reid, “MEMS with Flexible Portions Made of Novel Materials” (7,071,520).

J.S. Reid, “Transition Metal Dielectric Alloy Materials for MEMS” (7,057,246).

A.G. Huibers, P.J. Heureux, J.S. Reid, “Deflectable Spatial Light Modulator Having Superimposed Hinge and Deflectable Element” (6,529,310).

A.G. Huibers, P.J. Heureux, J.S. Reid, “Deflectable Spatial Light Modulator Having Stopping Mechanism” (6,396,619).

J.S. Reid, “Structurally Disordered Titanium-Nitride Films Produced by Sputtering for Flexible

Beams in Micro-electromechanical Applications” (Application Filed).

S.R. Summerfelt, J.S. Reid, M-A. Nicolet, and E. Kolawa, “A Conductive Noble-Metal-Insulator-Alloy Barrier for High-Dielectric-Constant Material Electrodes” (5,729,054).

S.R. Summerfelt, J.S. Reid, M-A. Nicolet, and E. Kolawa, “Method of Forming Conductive noble-metal-insulator-alloy barrier layer for High-Dielectric-Constant Material Electrodes (5,696,018).

INVITED TALKS

• “Novel Organosiloxane Low-k Materials for Subtractive Al Applications,” American Vacuum

Society: Thin Films, Sunnyvale, CA, 2004.

• “Amorphous Diffusion Barriers for Silicon Metallizations,” Advanced Metallization

for ULSI Applications, Tokyo, Japan, 1995.

PUBLICATIONS

K. Mackay, I.L. Prejbeanu, J-P. Nozières, J. Reid, Y. Conraux, L. Lombard, E. Gapihan C. Ducruet, C. Portement, R. C. Sousa, J. Hérault and B. Dieny, “Thermally Assisted Switching MRAM,” IEEE NVMTS (2009).

J. Paulasaari, J.T. Rantala, J.S. Reid, N. Hacker, “Molecular Engineering for low- and ultra low-k,” European Semiconductor, February, 2004.

J.T. Rantala, W. McLaughlin J.S. Reid, D. Beery, N.P. Hacker, “The Case for Nonporous Low-k Dielectrics,” Solid State Technology, December 2003.

J.S. Reid, J.T. Rantala, T. Tormanen, N.S. Viswanathan, N. Pirila, N. Hacker, T. Kobayashi, J. Kokko, M. Ben-Tzur, F. Badrieh, C. Seams, Novel Organo-Siloxane Materials for Low Dielectric-Constant Applications, Silecs whitepaper distributed to customers.

D. Crafts, J. Reid, B. Wallace, R. Kacprowicz, S. Kalpat, and T. Alexander, “Detection, Containment, and Elimination of Catastrophic C4 Base-Metal Rupture, Enabling Timely OLGA Product Release, ”Intel Assembly and Test Technology Journal 2 (1999).

D. Gourley, J.S. Reid, V. Jain, “Dollar Cost Savings through Novel Metal Stack-Optimization,”Intel Manufacturing Excellence Conference Proceedings (1997).

X. Sun, J.S. Reid, E. Kolawa, M-A. Nicolet, and R.P. Ruiz, “Reactively Sputtered Ti-Si-N Films 2: Diffusion Barriers for Al and Cu Metallizations on Si,” J. Applied Physics 81 (2): pp664-671 (1997).

X. Sun, J.S. Reid, E. Kolawa, M-A. Nicolet, and R.P. Ruiz, “Reactively Sputtered Ti-Si-N Films 1: Physical Properties, J. Applied Physics 81(2), 656-663 (1997).

J.G. Fleming, P.M. Smith, J.S. Custer, E. Roherty-Osmun, M. Cohn, R.V. Jones, D.A. Roberts, J.A.T. Norman, A.K. Hochberg, J.S. Reid, Y-D. Kim, T. Kacsich, and M-A. Nicolet, “Characteristics of CVD Ternary Refractory Nitride Diffusion Barriers," in Advanced Metallizations for ULSI Applications in 1996, R. Haveman, J. Schmitz, K. Tsubouchi, eds. Materials Research Society, Pittsburgh, PA, pp. 245-251 (1997).

J.S. Reid, M.S. Angyal, D. Lilienfeld, P.M. Smith, Y. Shacham-Diamand, and M-A. Nicolet, "Barrier/Cu Contact Resistivity," in Advanced Metallizations for ULSI Applications in 1995, R.C. Ellwanger and Shi-Quing Wang, eds. Materials Research Society, Pittsburgh, PA, pp. 387-393 (1996).

C.C. Ahn and J.S. Reid, "Cluster Synthesis and Trench Filling Using Inert Gas Condensation and Ballistic Deposition," in Advanced Metallizations for ULSI Applications in 1995, R.C. Ellwanger and Shi-Quing Wang, eds. Materials Research Society, Pittsburgh, PA, pp. 181-186 (1996).

P.M. Smith, J.S. Cluster, R.V. Jones, A.W. Maverick, D.A. Roberts, J.A.T. Norman, A.K. Hochberg, G. Bai, J.S. Reid, M-A. Nicolet, "Chemical Vapor Deposition of Ti-Si-N for Diffusion Barrier Applications," in Advanced Metallizations for ULSI Applications in 1995, R.C. Ellwanger and Shi-Quing Wang, eds. Materials Research Society, Pittsburgh, PA, pp. 249-256 (1996).

X. Sun, J.S. Reid, E. Kolawa, and M-A. Nicolet, "Reactively Sputtered Ti-Si-N Diffusion Barriers," in Advanced Metallizations for ULSI Applications in 1995, R.C. Ellwanger and Shi-Quing Wang, eds. Materials Research Society, Pittsburgh, PA, pp. 401-408 (1996).

J.G. Fleming, E. Roherty-Osmun, J. Custer, P.M. Smith, J.S. Reid, M-A. Nicolet, "Growth and Properties of W-B-N Diffusion Barriers Deposited by Chemical Vapor Deposition," in Advanced Metallizations for ULSI Applications in 1995, R.C. Ellwanger and Shi-Quing Wang, eds. Materials Research Society, Pittsburgh, PA, pp. 369-373 (1996).

J.S. Reid, R.A. Brain, C.C. Ahn, “Ballistic Deposition of Al Clusters into High Aspect Ratio Trenches,” VMIC Proceedings, 1995.

J.S. Reid, E. Kolawa, C.M. Garland, M-A. Nicolet, F. Cardone, D. Gupta, and R.P. Ruiz, “Amorphous (Mo, Ta, or W-Si-N Diffusion Barriers for Al Metallizations,” J. Applied Physics 79(2), 1109-1115 (1996).

M.S. Angyal, Y. Shacham-Diamand, J.S. Reid, and M-A. Nicolet, “Performance of Tantalum-Silicon-Nitride Diffusion Barriers between Copper and Silicon Dioxide,” Appl. Phys. Lett (1995).

G.F. McLane, L. Casas, J.S. Reid, and M-A. Nicolet, “Reactive Ion Etching of Ta-Si-N Diffusion Barriers in CHF3 + O2,” Electronics Letters 31(7), 591-592 (1995).

J.S. Reid, R.Y. Liu, P.M. Smith, R.P. Ruiz, and M-A. Nicolet, “W-B-N Diffusion Barriers for Si/Cu Metallizations,” Thin Solid Films 262 (1-2), 218-223 (1995).

J.S. Reid, X. Sun, E. Kolawa, and M-A. Nicolet, “Ti-Si-N Diffusion Barriers between Silicon and Copper,” IEEE Electron Device Letters 15(8), 298-300 (1994).

J.E. Parmeter, G.A. Petersen, P.M. Smith, C.A. Apblett, and J.S. Reid, “The Resistivity of Thin Copper Films Grown via CVD from (hfac)Cu(TMVS),” J. Vacuum Science and Technology B., 13 (1) 130-136 (1995).

G. McLane, L. Casas, J.S. Reid, E. Kolawa, and M-A. Nicolet, “Reactive Ion Etching of Ta-Si-N Diffusion Barriers in CF4/O2 Plasmas,” J. Vacuum Science and Technology B. 12(4), 2352-2355 (1994).

P.M. Smith, J.G. Fleming, R.D. Lujan, E. Roherty-Osmun, and J.S. Reid, “Chemical Vapor Deposition and Characterization of Tungsten Boron Alloy Films,” in Advanced Metallizations for ULSI Applications in 1993, D. P. Favreau, Y. Schacham-Diamand, and Y. Horiike, eds. Materials Research Society, Pittsburgh, PA, pp. 345-352 (1994).

X. Sun, E. Kolawa, J.S. Reid, and M-A. Nicolet, “Effect of Aluminum Grain Growth in Al/Ta36Si14N50/Au Metallizations,” in Advanced Metallizations for ULSI Applications in 1993, D. P. Favreau, Y. Schacham-Diamand, and Y. Horiike, eds. Materials Research Society, Pittsburgh, PA, pp. 575-582 (1994).

J.S. Reid, E. Kolawa, R.P. Ruiz, and M-A. Nicolet, “Evaluation of Amorphous (Mo,Ta,W)-Si-N Diffusion Barriers for Si/Cu Metallizations,” Thin Solid Films 236(1-2), 319-324 (1993).

X. Sun, E. Kolawa, J.S. Chen, J.S. Reid, and M-A. Nicolet, “Properties of Reactively Sputtered Ta-N Thin Films,” Thin Solid Films 236(1-2), 347-351 (1993).

E. Kolawa, X. Sun, J.S. Reid, R.P. Ruiz, and M-A. Nicolet, “Amorphous W40Re40B20 Diffusion Barriers for Si/Al and Si/Cu Metallizations,” Thin Solid Films, 236(1-2), 301-305 (1993).

J.S. Reid, R.P. Ruiz, E. Kolawa, J.S. Chen, J. Madok, and M-A. Nicolet, “Ta-Si-N and Si3N4 Encapsulants for InP,” in Mat. Soc. Proc. vol. 260-B, A. Katz, Y.I. Nissim, S.P. Murarka, and J.M.E. Harper eds., Materials Research Society, Pittsburgh, PA, pp. 555-560 (1993).

J.S. Reid, E. Kolawa, and M-A. Nicolet, “Thermodynamics of (Cr,Mo,Nb,Ta,V,or W)-Si-Cu Ternary Systems,” J. Mat. Res. 7(9), 2424-2428 (1992).

J.S. Reid, E. Kolawa, T.A. Stephens, J.S. Chen, and M-A. Nicolet, “Thermodyanic Stability of Ta-Si/Cu bilayers,” in Advanced Metallization for ULSI Applications, V.V.S. Rana, R.V. Joshi, and I. Ohdomari eds., Materials Research Society, Pittsburgh, PA, pp. 285-291 (1992).

P.J. Pokela, E. Kolawa, R.P. Ruiz, J.S. Reid, and M-A. Nicolet, “Thermal Stability and the Failure Mechanism of the Al/W76N24/Au Metallization,” Thin Solid Films 208, 33-37 (1992).

P.J. Pokela, J.S. Reid, C-K. Kwok, E. Kolawa, and M-A. Nicolet, “Thermal Oxidation of Amorphous Ternary Ta36Si14N50 Thin Films,” J. Appl. Phys 70(5), 2828-2832 (1991).

E. Kolawa, J.S. Chen, J.S. Reid, P.J. Pokela, and M-A. Nicolet, “Amorphous Ta-Si-N Diffusion Barriers in Si/Al and Si/Cu Metallizations,” J. Appl. Surf. Sci. 53, 373-376 (1991).

J.S. Reid, J.S. Chen, E. Kolawa, A. Sherman, and M-A. Nicolet, “A Comparison Between CVD and Sputtered TiN Diffusion Barriers in Cu and Al Metallizations for Si,” presented at 1991 MRS Spring Meeting, Anaheim, CA (presentation only, work unpublished).

E. Kolawa, J.S. Reid, J.S. Chen, R.P. Ruiz, and M-A. Nicolet, “Reliability of High-Temperature Metallizations with Amorphous Ternary Diffusion Barriers,” in Transactions of the First High Temperature Electronics Conference, D.B. King and F.V. Thomas eds., Wright Laboratory and Sandia National Laboratories, pp. 131-135, Albuquerque, NM (1991).

E. Kolawa, J.S. Chen, J.S. Reid, P.J. Pokela, and M-A. Nicolet, “Tantalum Based Diffusion Barriers in Si/Cu Metallizations,” J. Appl. Phys. 70(3), 1369 (1991).

E. Kolawa, P.J. Pokela, J.S. Reid, J.S. Chen, M-A. Nicolet, and R.P. Ruiz, “Sputtered Ta-Si-N Diffusion Barriers in Cu Metallizations for Si,” IEEE Electron Device Letters 12(6), 321-323 (1991).

C.S. Rossington, J.M. Jaklevic, J.S. Reid, C. Haber, and F. Kirsten, “A Position-Sensitive Detector for X-ray Diffraction,” in Advances in X-ray Diffraction Analysis, vol. 34, C. Barrett et al. eds, Plenum Publishing Corporation, New York (1990).

Contact this candidate