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Digital Design Test Engineer

Location:
La Jolla, CA
Salary:
130000
Posted:
October 22, 2023

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Resume:

Sahana Srikanth

ad0j64@r.postjobfree.com 858-***-**** LinkedIn: www.linkedin.com/in/sahana-srikanth-130***-**** Costa Verde Blvd, La Jolla University of California, San Diego California, USA Master of Science in Electrical and Computer Engineering; Majoring in Electronic circuits and systems September 2019- June 2020 National Institute of Technology, Tiruchirappalli Tamil Nadu, India Bachelor of Technology in Electrical and Electronics Engineering July 2014 - May 2018 Relevant Coursework: Communication circuits and systems, VLSI Test, Control systems and stability analysis, Digital Design Project, VLSI Digital System and Algorithms, Digital Signal Processing, Random Processes, Analog Integrated Circuits, Digital Electronics, Biomedical Integrated circuits and Systems, Circuit Theory, Microprocessors and Microcontrollers, Data Structures and Algorithms, Fuzzy Systems and Algorithms. SKILLS

Languages: System Verilog, Python, C, C++, Java, VBA Software: Matlab, Hspice, Virtuoso, PSpice, KiCAD, Spotfire, Quartus Prime WORK EXPERIENCE

Qualcomm Technologies Inc May-2022-Present

San Diego

Product and Test Engineer

• Headed the product development and testing of synthesizer modules, including creating the test sequences, test parameters and test plan.

• Created Test sequences to perform and analyze spur search measurements using spectrum analyzer.

• Performed ATE testing on synthesizer modules and created data processing scripts using python to process data of thousands of devices under test. (DUTs).

• Automated the process of calibrating device under test using python and significantly reduced the time required for calibration. Anokiwave Inc July 2020-May 2022

San Diego

Systems Test Engineer

• Headed the testing of four beamformer ICs which involved creating the test plan, test scripts, calibration scripts, customer driver and GUI using python.

• Automated the process of taking measurements with Vector Network Analyzer (VNA), Function Generator, Digital Signal Oscilloscope and Spectrum Analyzer.

• Performed Error Vector magnitude measurements including creating the testing script and calibrating the fixture.

• Performed Timing tests and power budgeting on various beamformer ICs.

• Hands on experience in measuring S-Parameters, Noise Figure, OP1, IP1, OIP3, IIP3, Stability, Gain Slope over temperature, Switching Speed, SPI Speed. Also in performing DK/ENG tests.

• Created Spotfire templates for analysis of production data of over ten thousand parts and created preliminary reports for pre-release of the parts.

pSemi Corporation July 2019 - September 2019

San Diego

Product Engineering Intern

• Assisted test engineers in curve tracing and fault analysis of Neon wafers.

• Handled re-probe requests for wafer lots using data from Exensio.

• Developed a tool using VBA to find the offsets required to set the limits for wafer tests with different Flanders Testers.

• Automated the process of extracting the IP lists required for the comparison of wafer test results tested with different testers.

• Effectively developed a script using Python and VBA to automate the creation of a product compliance matrix from the given product requirements document (PRD).

• Developed a Shell script to automate the process of extraction of the product hierarchy summary. National Metrology Centre (NMC), A*STAR May 2017 - Aug 2017 Singapore

Research Intern - Under Dr. Shan S Yueyan

• Designed a synchronous up/down counter (IC 4029) which feeds a 7 segment decode/driver (IC 4511) driving a LED display. An analog display was further designed to display the last digit of the counter.

• Built a 1:10000 divider using four Johnson counters with input buffering performed by schmitt-triggered inverters.

• Simulated and fabricated the counter-divider design using ExpressPCB. Indian Institute of Technology, Madras May 2015 - Aug 2015 Tamil Nadu, India

Research Intern - Under Dr. Radha Krishna Ganti

• Devised a linearization technique to show that the self-interference channel in an indoor environment can be effectively modelled as H(f)=C0+C1f in the frequency domain, irrespective of the multipath environment.

• Designed a self-interference cancellation architecture comprising of a Digital to Analog converter, power amplifier, Vector modulator and Low noise amplifier using KiCAD software. PROJECTS

University of California, San Diego – Under Dr. Patrick Mercier:

• Worked on a project aimed at designing a Right Leg Driven ECG Amplifier with optimum noise cancellation.

• The circuit was successfully designed and simulated using Cadence Virtuoso. University of California, San Diego – Under Dr. Drew Hall:

• Designed a two-stage differential amplifier with current mirror biasing circuitry to meet the given design specifications.

• The circuit was designed and simulated using Cadence Virtuoso. The specifications were successfully met by sizing the transistors appropriately.

University of California, San Diego - Under Dr. Baskar Rao:

• Reconstructed an audio signal back from a noise filled channel using Signal Processing Techniques in MATLAB. National Institute of Technology -Under Dr. N. Ammmasai Gounden:

• Worked on a project to monitor an arduino based motion detecting streetlight that aims at saving energy by aaadetecting the vehicle movement and simultaneously switching off the trailing light using Pulse Width modulation

• The circuit was simulated using PSpice and fabricated successfully.

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