California state university Northridge, California Dec 2015
Masters of Science, Electrical and Computer Engineering
Visvesvaraya Technological University, Karnataka, India Jul 2010
Bachelors of Engineering, Electronics and Communication
Qualcomm Inc – San Diego, CA Product/Test Engineering Support May 2016 - Present
Perform IC characterization, validation on ATE and bench environment of Qualcomm RF products.
Assisting design team in optimizing test performance for RF transceivers for different cellular standards.
Measure RF Receiver parameters (Gain, NF, Linearity) Transmitter parameters (ACLR, EVM, RXBN, ORFS) and work with Lab equipment such as Spectrum analyzer, Network analyzer, Temperature control unit.
Develop the test cases with QBEST interface and Test Executive in LABVIEW for running bench characterization tests or give instructions to technicians to run the test on chip and collect the data.
Identify Issues in the design and Evaluate product performance to specifications and analyze large sets of data statically using Data power and Microsoft Excel.
Improved product yield by processing and reviewing test data using statistical techniques (via Data Power) for automated test equipment across temperature/process variations.
Knowledge on 802.11 n/ac/ax WLAN, LTE, GSM, CDMA Standards
Karni Tech Solutions Pvt.Ltd- India Aug 2012- Aug 2013
Mixed signal IC bench characterization
Involved with pre-silicon planning, hardware validation, PVT char and data analysis based on statistical methods.
Test program development of DC and AC parameters such as VIL, VOH, VOL, IDDQ, DIDD.
Creation of bench char automation program, which include equipment’s such as power supply, temperature forcing equipment, oscilloscope which are connected through GPIB and controlled by LabView.
Trained on basics of different DFT techniques like JTAG, ATPG & MBIST test on ATE platform.
Design and Simulation tools
Matlab, LabView, ADS
Hardware description Language
C, C++, Python, VBA
CRO, multi-meters, power supplies, Network analyzer, Spectrum analyzer
JMP, MS-Excel, Data-Power
California State University, Northridge
Analytical Model of GaN MESFETs (MS Thesis)
Implemented GaN MESFET considering NDR effect and domain effect.
Analysis to show GaN material and devices have extreme potential for future research scope for innovative development of high power THz devices.
8-bit RISC CPU (Verilog and Synopsys VCS) and 64-bit ALU (VHDL and Xilinx ISE)
• Designed/Implemented CPU using RTL (Verilog HDL), 64bit ALU and Simulated using Modelsim which involved basic arithmetic and logical operations coding and integration of many sub-designs.
Multi stage LNA (Low Noise Amplifier) used ADS to perform simulation operations.
Designed 10GHz LNA which included designing transistor, S parameters, stability factor and figure of merit.
Related Courses: VLSI Design, DFT, Digital IC/SRAM testing, Active Microwave Devices, Wireless communication, Fundamentals of Digital Electronics, Digital communication, Solid State Devices, Micro Chip Fabrication, Verilog, FPGA, Analog-Digital Design, Network Analysis.
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