Swetha Varadarajan
Fort Collins, CO *****
720-***-**** Email: ***********.******@*****.*** Linkedin: https://in.linkedin.com/in/swesri Available: May 2017
EDUCATION
Colorado State University, Fort Collins, CO Aug 2013 – Present Candidate for a Master of Science in Electrical Engineering, GPA: 3.6/4 Expected Graduation: Spring 2017 SASTRA University, India
Bachelor of Technology (Honors) in Electronics & Communication Engineering, GPA:3.8/4 May 2013 TECHNICAL KNOWLEDGE
Languages: Expert- C, Python, C++, CUDA, MPI, Open MP, Shell script Intermediate- HTML, VHDL, Java Novice- MIPS Systems: Expert- Ubuntu, Fedora, Windows 7 Intermediate- Mac Novice- Unix Software: Eclipse, Nsight, Simulink, Matlab, Vtune Amplifier, Perf, CACTI, Gem5, Noxim, CCS, LATeX and MS Office RELEVANT EXPERIENCE
Colorado State University, Fort Collins, CO
Graduate Teaching Assistant- (Advanced) Application design & development Jan 2017 - Present
Collaborate with Professor in grading and setting-up of Java programming assignments. Colorado State University, Fort Collins, CO
Graduate Teaching Assistant- Parallel Programming Aug 2016 – Dec 2016
Set up HTML scripts for the course webpage. Python/Shell scripting for automatic testing and grading of programming assignments through web interface. Prepared quiz questions for the class.
Worked on 8-core single multi-core Intel Sandy bridge for OpenMP programs, Cray Model XE6 with 2688 cores for MPI programs and NVIDIA Maxwell architecture for CUDA programs.
Lectured a class on Back Propagation Learning algorithm implementation in CUDA. Colorado State University, Fort Collins, CO
Graduate Research Assistant – High Performance Computing Aug 2014 – July 2016
(Masters Thesis) Parallelization and optimization of computations found in RNA-RNA interaction application. Re- writing polyhedral computations in a Domain-specific language called AlphaZ that generates optimized OpenMP C code with user specified program transformations.
(Mentor) for a class project during Fall 2015. Supervised and helped a student to improve the parallel performance of
“McCaskill algorithm” from O(N4) to O(N3) through program transformations.
Micro-benchmarking on GPU: Performed benchmarking on several kernels similar to Matrix Maultiplication on 3 different GPU architecture to measure and tune performance (GFLOPS/s) and bandwidth(Gbytes/s)
Micro-benchmarking on CPU: Performed benchmarking on kernels like Triangular Matrix Mulitplication and other higher data dimensional kernels (6 dimensions) on Intel Haswell to measure and tune performance (GFLOPS/s). Studied vectorization(SIMD), optimization reports and also the effect of various compiler flags on ICC and GCC. Colorado State University, Fort Collins, CO
Research Programmer - Department of Forest, Rangeland and Watershed Stewardship Summer 2014
Studied and analyzed the given CUDA application that has been implemented for calculating Haralick texture features
Modified certain files/functions so that it can be adopted for geo-referencing features and algorithms. Lucas-TVS, Chennai, India
Intern – Embedded systems laboratory Dec 2012 – April 2013
Developed a Simulink-Stateflow model for automatic stop-start mechanism of modern cars.
Generated the code for TI’s TMS320F controller series using Embedded Coder and TI’s Code Composer Studio
Developed a PCB design for input and output signal conditioning. Simulated signals through switches, function generators and ran laboratory level experimentation for TMS320F series. Results were viewed in oscilloscope.
Extended the model to incorporate the Ultra-capacitor based Regenerative Braking system.