Engineering Power

RAMPRASATH.S

e-mail: ************@*****.***

Mobile: +919*********

CAREER OBJECTIVE:

To work in an organization that offer competitive environment helping me to demonstrate my skills and deliver to best of my capabilities.

EDUCATIONAL QUALIFICATIONS:

COURSE

INSTITUTION

UNIVERSITY

/BOARD

YEAR OF PASSING

AGGREGATE

B. E

(Electronics and Communication Engineering)

SNS College of Technology-Coimbatore

Anna University

Chennai,

Tamilnadu.

2015

7.11 CGPA

HSC

Nadar Saraswathi Higher Secondary School - Theni

State Board of

Tamilnadu.

2011

80.3%

SSLC

Nadar Saraswathi Higher Secondary School-Theni

State Board of

Tamilnadu.

2009

92.4%

ACADEMIC PROJECT:

Main Project:

Project Title: Design of low voltage low power double tail comparator.

Description: Design of Low-power, area efficient and high speed analog-to-digital converters are pushing towards the use of dynamic comparators, which are used to maximize speed and reduce power consumption. In the proposed design, Power gating is a technique used to reduce power consumption, by shutting off the current to blocks of the circuit that are not in use. Power gating uses low-leakage PMOS transistors as header switches to shut off power supplies to parts of a design in standby or sleep mode. NMOS footer switches can also be used as sleep transistors.

STRENGTHS:

Cooperative

Quick learner

Flexible

EXTRA CURRICULAR ACTIVITIES:

Member in Institute of Electronics and Telecommunication Engineering(IETE)

Participated in District level Yoga Competition.

Participated and won First prize in junior level Basketball competition.

.

CO CURRICULAR ACTIVITIES:

Presented paper on “ZIGBEE” and won FIRST PRIZE conducted by KSR college of Technology on 19th Feb 2014

Presented paper on “MICROPROCESSOR BASED GATE SECURITY SYSTEMS” conducted by Adithya Institute of Technology on 01st Mar 2013.

Participated in SCIENCE AND TECHNOLOGY EXHIBITION conducted by Erode Sengunthar Engineering College on 8th Dec 2011.

INPLANT TRAINING:

Attended 15 days In-plant training from 15-06-2013 to 30-06-2013 at TECHSPINE SOLUTIONS, COIMBATORE about EMBEDDED SYSTEMS.

TECHNICAL SKILLS:

Undergone hands on training on Custom IC design using CADENCE EDA organized at ASIC Centre of excellence in Dr.Mahalingam college of technology, Pollachi.

PERSONAL PROFILE:

Father’s Name : T.Selvam

Mother’s Name : S.Muthulakshmi

Date of Birth : 21-10-1993

Passport No : M1443769

Languages Known : Tamil, English

Hobbies : Playing cricket and Basket Ball.

Address : M-98,Housing unit,Nethajipuram,N.K.palayam (Po), Coimbatore(Dt)

Tamilnadu-641033.

DECLARATION:

I hereby declare that the above particulars furnished by me are true to the best of my knowledge and belief.

Place: Coimbatore

Date : S.RAMPRASATH

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