Engineer Technical

Won Gyu Park

(g ********@*****.*** )

Cell: (***) - 202-7755

OBJECTIVE:

A Technical Marketing position in Semiconductor Technology that maximizes my experience i n NAND Flash Technical Marketing, Process Integrate NAND Flash and DRAM. SUMMARY:

● Extensive experience in Technical Marketing for NAND for PGD2 Wafer Business, SD Card, USB COB, SSD, and eMMC for Automotive and Enterprise Network.

● Proven skills in acquiring proactive product qualification and establishing effective technical collaboration with internal teams and TIER 1 customers to develop new business opportunities.

● Extensive semiconductor knowledge combined with hands-on experience in:

-Automotive/ Enterprise Network/ Card/SSD customers’ requirements

-Process Integration, design/ device key features, and wafer production processes. PROFESSIONAL EXPERIENCE:

03/2013- S enior Manager of Flash Technical Marketing @ SK Hynix America (former Hynix)

● Support in key areas including:,

-. NAND Flash for Client/ Enterprise SSD, SD/USB Card customers.

-. eMMC for Automotive/ Enterprise Network customers.

-. PGD2 Wafers for Module house

● Lead Technical Collaboration:

● -. Published Market Intelligence Report

● -. Survey NAND Flash key feature requirements

-. Support technical inquiries during qualification process and mass production.

● Manage NAND Flash field quality including:

- Managed customers’ field failures

- Managed RMA and quality issues

09/08- S EManager of Flash Customer Satisfaction Team @ Hynix semiconductor

● Part Leader to support technical inquiries and quality issue from Mobile/SSD/NAND/ PGD2 Wafer customers

● Lead the root-cause analysis and corrective actions of factory and field return failures

● Lead to implement customers’ key test features and items to improve the product quality 01/04- M anager of NAND Flash Process Integration Team @ Hynix semiconductor (Former Hynix)

● Process Integration and Architect Engineer, experienced fabrication process of NAND Flash from wafer input to package testing including electrical/physical characterization of process improvement, electrical/physical analysis of failures on wafer and package level which covered,

● -. F20, TLC, MLC and SLC

● -. F26, MLC and SLC

● -. F32 MLC and SLC

● -. F48 MLC and SLC

● -. F57 MLC and SLC

● -. F 70 SLC

● -. F90 SLC

Engineering Staff of DRAM Process Integration Team @ LG Semiconductor since January, 1997

● Process Integration and Architect Engineer, experienced fabrication process of NAND Flash from wafer input to package testing including electrical/physical characterization of process improvement, electrical/physical analysis of failures on wafer and package level which covered,

● -. 0.13um, 512Mb DDR/ 256Mb DDR2

● -. 0.145um, 512Mb DDR

● -. 0.15um, 256Mb SDR

● -. 0.16um, 64Mb SDR, 128Mb SDR

● -. 0.18um, 64Mb SDR

EDUCATION

M.S. (Master of Science) Electronics Engineering, Chosun University, Kwangju, Korea MBA (Masters of Business Administration), Yeonse University, Seoul, Korea B.S. (Bachelor of Science) Electronics Engineering, Chosun University, Kwangju, Korea

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