System Engineering

Vishal Vishnani

Boulder, Colorado-***** +1-720-***-**** ****************@*****.*** https://www.linkedin.com/in/vishal-vishnani-46337a117/ EDUCATION

Professional Masters of Science in Embedded Systems (Electrical and Electronics Engineering) August 2016 –Present University of Colorado Boulder GPA – 3.567/4

Courses: Programmable System on a Chip, Mastering Embedded System Architecture, Embedding Sensors and Actuators, Embedded Software Essentials, Advanced Computer Architecture Bachelor of Engineering in Electronics and Telecommunication June 2016 Vivekanand Education Society Institute of Technology, Mumbai University GPA – 8.17/10 RELEVANT EXPERIENCE

Graduate Teaching Assistant, University of Colorado Boulder (PSoC) March 2017 – Present

• Assist professor with course and project planning, also conduct live demo and interview for projects.

• Help graduate level students with C, HDL coding, simulation and concepts. Intern, Godrej & Boyce June 2014 – July 2014

Study internship on Electronic controllers and its Applications. ENGINEERING PROJECTS

• DMA, libraries for SPI and nRF, Timer Profiling: Designing our own SPI and nRF24l01+ libraries, to establish communication between FRDMKL25Z board and nRF24l01+ transceiver modules. Implement DMA to perform block memory transfers. Also, timer profiling to be done to compare the time taken for some standard library functions versus custom built functions. [Present]

• Build System using GCC: Developed a build system by using make and created a Makefile to specify compiler options, build operations and source files. This Makefile was made architecture independent to interchangeably switch between different compilers for different target platforms using compile time switch. Spring 2017

• Data Structures, Unit Test, Microcontroller UART drivers: Designed UART drivers for FRDM KL25Z. Implemented transmit and receive circular buffer for synchronization along with wrapper logger function. Implemented unit test for different functions using cmocka framework. This system was made platform independent by using compile time switches for BeagleBone Black, KL25Z and host machine. Spring 2017

• System Design and PONG game using Altera Cyclone V DE1 SoC: Implemented “PONG game” using Verilog HDL and FPGA fabric on DE1-SoC (Cyclone V) board. The Hard Processor System (HPS) of Cyclone V DE1 SoC (ARM Cortex-A9) was made to communicate with the FPGA fabric, where a shift operation was performed and displayed using on- board LEDs. Implemented Real Time Clock and Morse Code using Verilog, VHDL and Assembly. Fall 2016

• MSS, ACE, UART configuration and Timing Analysis on SmartFusion SoC: Configured the Microcontroller Subsystem

(MSS), Analog Computer Engine(ACE) block and Analog channels using SmartDesign tool (Libero Software), to monitor the voltage across the on-board potentiometer and displayed them on terminal by transmission through UART. Analyzed timing parameters like setup and hold slack, clock domain crossing and false path using SmartTime tool and techniques to prevent metastability and uncertain states during clock domain crossing. Fall 2016

• ADC configuration and embedding softcore on Altera MAX10 FPGA: Embedded a softcore processor (Nios II) in MAX10 FPGA using Qsys tool of Quartus Prime to display text on NIOS II console and control LEDS and switches. Interfaced temperature sensor and configured ADC to display the relative results using on board LED's. Fall 2016

• Embedded System Architecture Projects: Tested and evaluated MKL25Z128VLK4(Cortex M0+) for Vortex Flowmeter, STM32(Cortex M4) for Signal Analyzer and AM3358(Cortex A8) for VoIP application. Also, built a custom Windows CE 7 OS for VM. Fall 2016

• Home Automation System using PSoC 5LP: Built a prototype for Smart Home, interfacing various analog and digital sensors like thermistor, PIR, reed switch, LDR, CO sensor with PSoC 5LP. Fall 2016

• Audio Guided Indoor Navigation System for Visually Impaired: Designed an indoor navigation system with speech recognition feature and text to speech conversion using Raspberry Pi and navigation using nRF transceivers. We were awarded funding for this project from Mumbai University. August 2015 – May 2016 TECHNICAL SKILLS

Computer Languages: C, VHDL, Verilog, Python, Assembly Design/Dev Tools: Keil, Quartus Prime, Modelsim, Eclipse based IDE’s, MATLAB, Scilab, Simulink, Libero SoC, Altera Monitor Program, Pspice, Github, Kinetis Design Studio Protocols: UART, SPI