VARUN SHARMA

aczi43@r.postjobfree.com, +1-347-***-****

**-**, *** ******, ***** Park, NY 11416

LinkedIn: https://www.linkedin.com/varun

GitHub: https://github.com/91varunsharma

WORK EXPERIENCE

Mentor- Summer Research Students (Digital Logic Design)

(Jun. 2016-Aug. 2016)

Supervised research students in developing Reconfigurable software with reconfigurable Hardware on FPGA.

Teaching Assistant- Digital Logic & State Machine Design

(Jan. 2016-Present)

To help students develop a game developed using Xilinx ISE and Nexys 4 DDR FPGA board

Managing the semester long design project of students & help them in Digital logic and State machine concepts

‘Project Fellow’- National Physical Lab, India (Nov. 2014-Aug. 2015)

Did Virtual Instrumentation & Automation using LabVIEW

Measurements of transport properties (R-T & I-V) of superconducting thin films at low-temperature up to 4Kelvin

‘Graduate Engineer Trainee’ - Nokia Solutions & Networks

(NSN), Noida, India (Dec. 2013-Sept. 2014)

Solved WCDMA/HSPA/LTE queries for leading telecom operators. Customized solution building & Tool based network dimensioning.

TECHNICAL SKILLS

Programming skills: C/C++, VHDL, Embd C, Verilog, Python Designing

Tool: Cadence, LVS, DRC, Hspice, LabVIEW, MATLAB, Xilinx ISE, Vivado, ModelSim, Nexys4 FPGA, ARM

Other Computing skills: Data structures, OS, MS Office

Hardware skills: ASIC, VLSI floor-planning, STA, Clock tree snthesis, Clock Domain Crossings(CDC), Physical design, RTL design, Cache design, Advance pipelining, Multicore processors, CPU/micro-architecture, SoC, SRAM, Layout, CMOS, Logic design

EDUCATION

New York University, Tandon School of Engineering, Brooklyn, New York May 2017

MS in Computer Engg. GPA-3.54/4 (Graduate Scholarship)

Courses: VLSI Design, Analog IC Design, Nanoelectronics devices, Real-time embedded systems, Advanced Computer HW Design, Computer Arch-1&2, Data Structures & Algo

Guru Gobind Singh Indraprastha University, New Delhi, India

Bachelor of Technology (Electronics & Communication) GPA-76.34 (1st Class with distinction) June 2013

Courses: Analog Electronics, OOPs using C++, Digital Circuits, Computer Architecture, Microprocessors, VLSI Design

PROJECTS

’MIPS processor implemented on FPGA’ (Nov. 2016-Dec. 2016)

32-bit MIPS processor was written in VHDL and run it on FPGA

Implemented complete RC5 encryption & decryption using the MIPS instructions on the processor designed using VHDL

’Design of Multilevel Cache memory simulator ’ Nov. 2016

Designed a multilevel cache memory system simulator in C++ using round robin replacement policy on cache accesses

’32-bit MIPS Simulator using C++’ Oct. 2016

Designed an instruction-level simulator for a single cycle MIPS processor in C++ which model the execution of instructions.

‘Design & Enhancement of On-Chip Optical Interconnect Performance’- Term Paper (Feb. 2016-May. 2016)

Modelled the VCSEL (Vertical Cavity Surface Emitting Laser) based optical modulator using MATLAB Simulink

Performance comparison of electrical and optical interconnects indicated that latter is better for data transmission in high speed integrated circuits.

‘Two Stage OTA on 180nm technology’ (Apr.2016-May.2016)

Phase Margin- 72.8 Degrees, Closed Loop Gain~2, Open Loop Gain-59.1dB, Slew Rate-34.13 V/uS, GBW(0dB)-43.26 MHz, GBW(-3dB)-30.6 MHz were achieved

‘Accelerometer Based Gaming Console’ (Feb.2016-May. 2016)

Developed a standalone gaming device for a multiplayer Artillery Game. Users provide inputs to their players from the on board accelerometer of STM32F4Discovery micro-controller and the game is played on an LCD interfaced with the board.

‘Memory System Design 256-bit (6T-SRAM) & Layout using 45nm technology’ (Sep. 2015-Dec. 2015)

Lead a team of 4 and achieved weekly goals.

Read & Write margins were 30% and 50%, 6-T SRAM cell layout area < 1μm2, clocking frequency of 1.5 GHz and power supply as low as 780mV were achieved

‘Coaxial Rotor Aerial Vehicle (CRAV)’ (Jan. 2013-May. 2013)

A coaxial rotor remote controlled copter capable of carrying a payload up to 400 grams along with a camera was designed using ATMEL 328 PA IC using MATLAB & C coding

PUBLICATIONS

Anvinder Singh & Varun Sharma (2013) Design analysis and construction of energy harvesting coaxial helicopter, Aviation, 17:4, 145-149– Taylor & Francis

Anvinder Singh & Varun Sharma (2015) Techno-logical aspects of Time travel, IJAREAS, 4:2, 88-98-GARPH

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