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Electrical Engineering Design

Location:
Milpitas, CA, 95035
Posted:
May 11, 2017

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Resume:

Impana Ramesha

*** ***** ******* ****, *** G***•Mobile: 813-***-**** • acz9es@r.postjobfree.com

Professional Summary

Graduate student looking for full time opportunities in the field of electrical engineering. Education

Northwestern Polytechnic University - Fremont, CA. December 2016 Master of Science: Electrical Engineering GPA: 3.55 California State University - Fullerton, CA May, 2014 MS: Electrical Engineering

Sathyabama University – Chennai May 2013

Bachelor of Engineering (B.E): Electrical and electronics Engineering. GPA: 3.6 Technical Skills

• PCB layout designing: AutoCAD, Certified PULSONIX PCB designer, Autodesk AutoCAD software

• Networking: Industrial field and data networking with wireless communications.

• Micro wind: for VLSI design, VERILOG coding

• Automation: PLC Programing, HMI design.

• Operating system: Windows, UNIX, Linux.

• Matlab: coding, Simulation, Image processing

• Programing languages: C, C++, java

Work History

Carl Zeiss Inc. – Pleasanton, CA

Manufacturing Inspection Engineering Intern, 10/2016 to 12/2016.

• Designed and developed a test suite to automate the testing of multiple diffusers for the Andor camera using the Python programming language. Tested and Coordinated data analysis and provided recommendations based on test results.

• Tested X-ray sources, cameras and other critical components using released procedures. Performed X-ray source testing, knee point testing and cold cathode testing.

• Monitored the manufacture of electrical devices and operations to ensure compliance with safety protocols.

• Wrote protocols, qualification documents, test plans and test reports for quality assurance purposes.

• Performed detailed calculations to establish manufacturing, construction, and installation standards and specifications, maintaining 100% accuracy rate.

• Experience with lean manufacturing and HVAC design. Carl Zeiss IMT – Maple Grove, MN

Process Control Engineering Intern, 05/2016 to 08/2016

• Designed PCB schematics for LED board using Pulsonix. Successfully migrated PCB design from existing software (Eagle) to the new software (Pulsonix) without regression.

• Configured Surfmax tunnel from scratch and in the process helped to document the steps along with pictures. This is currently being used as an official guide for configuring Surfmax in the entire organization.

• Worked on CMMS using Calypso software.

• Managed engineering changes using SAP systems.

• Rendered technical drawings.

Base Automation – Chennai, India

Application Engineer, 07/2013 to 07/2014.

• Programing of Allen Bradley or Rockwell PLC's using RS LOGIX.

• Designed HMI screens using SCADA.

• Prepared Pre-sales techno-commercial proposal and BOM for applications in Factory Automation for Consumer Packaged Goods, Automotive, Tire & Rubber Industries.

• Managed engineering changes using SAP systems.

• Participated as internal auditor to maintain ISO standard. Accomplishments

• Advanced FPGA Design and Implementation.

VLSI Design using Micro wind: Designed and obtained analog simulation report for various counters and flip flops.

• Matlab: designed and performed image processing and color coding programs using MATLAB programming.

• Color and Texture Evaluation Unit using Image Sensor : developed a product that is commercially viable and for applications in manufacturing targeted at day-to-day need in color matching and texture evaluation in garments manufacturing and mechanized knitting.

• Computer Networking using Wireshark: Built a network, applied the course concepts in the virtual and cloud computing worlds to Sniff the contents of a standard website text box by installing Linux LAMP server to show traffic between two systems.

• VLSI Design using Micro wind: Designed and obtained analog simulation report for various counters and flip flops.

• Matlab: Kalman Filtering, image processing and counting Matlab.

• HSPICE: Performed the hspice ring OSC.

• Cadence/EDA playground: State Machines, Verilog simulation to derive the timing delays, fault generate test vectors and fault Synopsys DFT Compiler & TetraMax.



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